公开(公告)号：JP2000332101A

公开(公告)日：2000-11-30

申请号：JP2000131432

申请日：2000-04-28

Applicant: IBM

Inventor： JEFFREY SCOTT BROWN ,  BRYANT ANDRES ,  ROBERT J GAUTHIER JR ,  MANN RANDY W ,  VOLDMAN STEVEN H

IPC: H01L21/76 ,  H01L21/02 ,  H01L21/265 ,  H01L21/762 ,  H01L21/8222 ,  H01L21/8248 ,  H01L27/06 ,  H01L27/08 ,  H01L27/12 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a silicon-on-insulator(SOI) element having both an element which is completely depleted and an element which is partially depleted on a common substrate. SOLUTION: The semiconductor structure which has a continuous buried oxide layer 24 and multiple trench separate structures 33 and 35 and its formation are disclosed. The buried oxide layer is arranged in the substrate at >=2 trench separate structures in depth. The trench separate structures are variable in depth and it is not important whether the trench separate structures are in contact with the buried oxide layer or not. The two trench separate structures enter the substrate to the same or different depths. The trench separate structures provide insulating separation between areas in the substrate and the separated areas may include a semiconductor element. The semiconductor structure makes it easy to provide a digital element and an analog element on a common wafer. The dual-depth buried oxide layer facilitates the formation of an asymmetrical semiconductor structure.

公开(公告)号：JP2000357732A

公开(公告)日：2000-12-26

申请号：JP2000124263

申请日：2000-04-25

Applicant: IBM

Inventor： JEFFREY SCOTT BROWN ,  ROBERT J GAUTHIER JR ,  MANN RANDY W ,  VOLDMAN STEVEN H

IPC: H01L21/76 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/092

Abstract: PROBLEM TO BE SOLVED: To provide a method and a structure for improving latch up characteristic of a semiconductor element. SOLUTION: Dual depth STI 20 is used for mutually separating wells. A trench contains a first substantially horizontal face in a first depth and a second substantially horizontal face in a second depth which is deeper than the first depth. An n-well 26 and a p-well 28 are formed on the respective sides of the trench. A heavily-doped region 18 is formed below the second substantially horizontal face of the trench in a substrate. The heaving-doped region is adjacent to the first and second wells, and the separation of the trench is extended.

公开(公告)号：SG100646A1

公开(公告)日：2003-12-26

申请号：SG200101710

申请日：2001-03-17

Applicant: IBM

Inventor： JEFFREY SCOTT BROWN ,  STEPHEN SCOTT FURKAY ,  ROBERT J GAUTHIER JR ,  DALE WARNER MARTIN ,  JAMES ALBERT SLINKMAN

IPC: H01L29/78 ,  H01L21/265 ,  H01L21/335 ,  H01L21/336 ,  H01L29/10 ,  H01L29/167

Abstract: A FET with reduced reverse short channel effects is described, as well as a method to make said FET. Germanium is implanted throughout a semiconductor substrate at an intensity and dose such that a peak ion concentration is created below the source and drain of the FET. The germanium can be implanted prior to gate and source and drain formation, and reduces the reverse short channel effect normally seen in FETs. The short channel effect normally occurring in FETs is not negatively impacted by the germanium implant.

公开(公告)号：SG91862A1

公开(公告)日：2002-10-15

申请号：SG200002012

申请日：2000-04-10

Applicant: IBM

Inventor： JEFFREY SCOTT BROWN ,  STEVEN H VOLDMAN ,  RANDY WILLIAM MANN ,  ANDREAS BRYANT ,  ROBERT J GAUTHIER JR

IPC: H01L21/02 ,  H01L21/76 ,  H01L21/265 ,  H01L21/762 ,  H01L21/8222 ,  H01L21/8248 ,  H01L27/06 ,  H01L27/08 ,  H01L27/12 ,  H01L29/786

Abstract: A semiconductor structure, and associated method of fabrication, comprising a substrate having a continuous buried oxide layer and having a plurality of trench isolation structures. The buried oxide layer may be located at more than one depth within the substrate. The geometry of the trench isolation structure may vary with depth. The trench isolation structure may touch or not touch the buried oxide layer. Two trench isolation structures may penetrate the substrate to the same depth or to different depths. The trench isolation structures provide insulative separation between regions within the substrate and the separated regions may contain semiconductor devices. The semiconductor structure facilitates the providing of digital and analog devices on a common wafer. A dual-depth buried oxide layer facilitates an asymmetric semiconductor structure.