公开(公告)号：JP2002098982A

公开(公告)日：2002-04-05

申请号：JP2000270143

申请日：2000-09-06

Applicant: IBM

Inventor： SHIMIZU EIJU ,  KUSAFUKA KAORU ,  IKEZAKI MITSURU ,  TERUKINA ASAO

IPC: G02F1/1343 ,  G02F1/136 ,  G02F1/1368

Abstract: PROBLEM TO BE SOLVED: To provide a display panel and a display device, capable of enhancing opening ratio of a pixel area. SOLUTION: In each pixel area of a liquid crystal panel 100 of a transverse electric field system, a pixel electrode 18 is made into a two-layer structure consisting of a lower part pixel electrode 21, which is positioned on the same layer as that of a signal line 15 and a upper part pixel electrode 22, which is positioned on the same layer as that of a common electrode 17, and the electrode part of the lower part pixel electrode 21 is set closer to the signal line 15 than to the upper part pixel electrode 22. Moreover, the signal line 15, a gate line 16 and the common electrode 17 are arranged overlapped.

公开(公告)号：JP2000241827A

公开(公告)日：2000-09-08

申请号：JP3687899

申请日：1999-02-16

Applicant: IBM

Inventor： TERUKINA ASAO ,  IKEZAKI MITSURU ,  IIYORI HIDEO ,  HAYASHI KATSURO ,  FUJII YOSHIHARU ,  KURIHARA MIKIO ,  KIYOOKA FUMITOSHI

IPC: G09F9/00 ,  G02F1/13 ,  G02F1/1345

Abstract: PROBLEM TO BE SOLVED: To provide a liquid crystal display device having a COG (chip on glass) structure in which the width of the frame can be effectively decreased even in the COG structure. SOLUTION: In the liquid crystal display device having a COG structure, a common wiring 11 to connect plural chips 3 and a flexible printed circuit board(FPC) 8 are formed on a glass substrate 1. Pins 4-2 of the chips 3 to connect with the FPC and the common wiring 11 are connected on the glass substrate 1. The common wiring 11 and the FPC 8 are connected by using connecting terminals 7-1, 7-2 for the FPC which are disposed at least in one point on the common wiring 11.

公开(公告)号：JPH0962760A

公开(公告)日：1997-03-07

申请号：JP21033995

申请日：1995-08-18

Applicant: IBM

Inventor： TAMURA TETSUYA ,  TERUKINA ASAO ,  NOZAWA TORU ,  KOYAMA SEIJI ,  MAATEIN HASUNAA

IPC: G06G7/18 ,  G06G7/184 ,  G11B5/012 ,  G11B5/027 ,  G11B5/035 ,  G11B5/09 ,  G11B20/10 ,  H03F3/34

Abstract: PROBLEM TO BE SOLVED: To output the same integration result for the same bit pattern even if the variation of an integrating period, a semiconductor process and power source voltage, etc., exists. SOLUTION: This integrator is provided with a first integrator 1 having a first amplifier 1 and integrating reference voltage during an integrating period, a second integrator having a second amplifier 11 and integrating an input signal during the integrating period and a control means 7 outputting the signal adjusting the gain of the first amplifier 1 to the first amplifier 1 and adjusting the gain of the second amplifier 11 by using the signal adjusting this gain, so that the output of the first integrator may be changed according to the integrating period.

公开(公告)号：JPH08288848A

公开(公告)日：1996-11-01

申请号：JP7508495

申请日：1995-03-31

Applicant: IBM

Inventor： KOYAMA SEIJI ,  NOZAWA TORU ,  TERUKINA ASAO ,  SUZUKI KOSUKE

IPC: H04N9/00 ,  H03M1/10 ,  H03M1/74

Abstract: PURPOSE: To provide a current output type D/A converter which can appropriately compensate the fluctuation of characteristics caused by each constant current circuit. CONSTITUTION: Concerning a D/A converter 11 with which an analog output current corresponding to digital input data is provided from the output side by electrifying the respective output currents of plural constant current circuits while switching them to the output side or the non-output side corresponding to the digital input data, during a period in which the output currents of all constant current circuits L1 -L255 are switched to the non-output side, the feedback control of output current values from the constant current circuits is performed based on the analog output current on the non-output side.