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    MANUFACTURE OF SEMICONDUCTOR DEVICE
    1.
    发明专利
    MANUFACTURE OF SEMICONDUCTOR DEVICE 失效

    公开(公告)号：JPH08148566A

    公开(公告)日：1996-06-07

    申请号：JP28811494

    申请日：1994-11-22

    Applicant: IBM

    Inventor： SHIRAI MASAHARU ,  TERADA KENJI ,  TSUKADA YUTAKA ,  TSUCHIDA SHUHEI

    IPC: H01L21/28 ,  H01L21/48 ,  H01L21/768 ,  H01L23/522 ,  H05K3/00 ,  H05K3/46

    Abstract: PURPOSE: To provide a method of manufacturing a semiconductor device proper to form a via hole for easily attaching a conductor layer uniformly to the via hole in a substantially bowl shape. CONSTITUTION: A photosensitive resin 3 is mounted on a substrate 1 so that thickness, in which the thickness is removed by the grinding of the photosensitive resin 3 in a post-process is added to final required thickness as an insulating layer, is obtained. A cavity is formed to the photosensitive resin 3 by a specified pattern by exposure, development and etching, and the photosensitive resin 3, to which the cavity if formed, is thermoset. When a photosetting layer 6a show by a dotted line and a part of a thermosetting layer 3a in Fig. are ground and removed, a via hole 9 having a substantially bowl shape is formed.

    COOLING STRUCTURE OF SEMICONDUCTOR CHIP
    2.
    发明专利
    COOLING STRUCTURE OF SEMICONDUCTOR CHIP 失效

    公开(公告)号：JPH04326557A

    公开(公告)日：1992-11-16

    申请号：JP10814891

    申请日：1991-04-15

    Applicant: IBM

    Inventor： NAKAMA SUNAO ,  TSUCHIDA SHUHEI

    IPC: H01L23/36 ,  H01L21/60 ,  H01L23/367

    Abstract: PURPOSE: To prolong stress service life of a semiconductor chip, while improving the cooling effect of this semiconductor chip and to improve its reliability. CONSTITUTION: A semiconductor chip 4 is attached through a soldering ball 7 to a ground plane layer 2 on a wafer 1 by a face-down system, a heat- conducting member 5 attached to the ground plane 2 is provided through a heat-conducting layer 9 to the semiconductor chip in thermal contact, and heat from the semiconductor chip is radiated over a wide area, while utilizing the ground planar layer. Then, the semiconductor chip and the heat-conducting member are relatively movably contacted, so as not to propagate heat stress from the wafer caused by heating to the semiconductor chip. In this case, the heat-conducting member is made flexible, so as to avoid the effects of heat stress as well.

    SOLDERING METHOD AND SOLDERING DEVICE
    3.
    发明专利
    SOLDERING METHOD AND SOLDERING DEVICE 失效

    公开(公告)号：JPH0992682A

    公开(公告)日：1997-04-04

    申请号：JP24424695

    申请日：1995-09-22

    Applicant: IBM

    Inventor： KODAMA YASUSHI ,  TSUCHIDA SHUHEI ,  TSUKADA YUTAKA ,  ORII YASUMITSU ,  OKUMA HIDEO

    IPC: H01L21/60 ,  B23K1/005 ,  B23K1/012 ,  H01L21/603 ,  H05K3/34

    Abstract: PROBLEM TO BE SOLVED: To grip a chip by a head to solder keeping the molten solder by with molten. SOLUTION: Solder bumps 3 formed on a chip 1 face the electrodes 11 on a mounting board 10. Then the solder bumps 3 are heated to their melting points by heating a heating block 21 provided on the rear surface side of the chip 1. It is preferable to provide another heating block 22 on the rear surface of the board 10. With the solder bumps 3 molten, the bumps 3 are soldered to the electrodes 11 by bringing the bumps 3 into contact with the electrodes 11.

    MULTILAYER PRINTED CIRCUIT BOARD AND MANUFACTURE THEREOF
    4.
    发明专利
    MULTILAYER PRINTED CIRCUIT BOARD AND MANUFACTURE THEREOF 失效

    公开(公告)号：JPH04148590A

    公开(公告)日：1992-05-21

    申请号：JP25546490

    申请日：1990-09-27

    Applicant: IBM

    Inventor： TSUKADA YUTAKA ,  TSUCHIDA SHUHEI

    IPC: H05K1/02 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46

    Abstract: PURPOSE: To enhance wiring density and degrees of freedom in wiring layout and to minimize through-hole connections by using one side of a both-side copper coated circuit board for mounting parts and supplying a ground potential, and using the other side for supplying a power supply voltage. CONSTITUTION: A glass epoxy insulating board 10, of which both the sides are coated with copper layers 12 and 14, is prepared. A copper layer 12 is patterned by selective etching, so as to form a 1st wiring layer or wiring level including a signal wiring conductor 16. The downside copper layer 14 is used as a power supply layer. A photosensitive resin insulating layer 18 is applied, so as to cover the signal wiring conductor 16 on the 1st wiring layer, the photosensitive resin insulating layer 18 is exposed and developed, and a via 20 is formed at a selected position. All the surface of the insulating layer 18 forming the via 20 is coated with copper by non-electric plating, and a copper layer 22 at a 2nd level is formed. The copper layer 22 at the 2nd level is connected to the signal wiring conductor 16 at a 1st level by a plated via 24.

    PRINTED WIRING BOARD AND PREPARATION THEREOF
    5.
    发明专利
    PRINTED WIRING BOARD AND PREPARATION THEREOF 失效

    公开(公告)号：JPH06310865A

    公开(公告)日：1994-11-04

    申请号：JP34763892

    申请日：1992-12-28

    Applicant: IBM

    Inventor： SHIRAI MASAHARU ,  TSUCHIDA SHUHEI

    IPC: H05K3/46 ,  H05K1/11 ,  H05K3/00 ,  H05K3/06 ,  H05K3/40 ,  H05K3/42

    Abstract: PURPOSE: To provide a printed wiring board capable of being reliably connected to an internal layer wiring and of realizing high wiring density. CONSTITUTION: A blind hole 23 that reaches an internal wiring 22 and has a larger opening than a bottom part is formed on a substrate 21, and a conductor pattern 25 is formed on a bottom surface and an internal peripheral surface of the blind hole 23 for connecting the internal layer wiring 22 and a surface layer wiring 24.

    MANUFACTURE OF MULTILAYER PRINTED CIRCUIT BOARD
    7.
    发明专利
    MANUFACTURE OF MULTILAYER PRINTED CIRCUIT BOARD 失效

    公开(公告)号：JPH10135642A

    公开(公告)日：1998-05-22

    申请号：JP26147897

    申请日：1997-09-26

    Applicant: IBM

    Inventor： TSUKADA YUTAKA ,  TSUCHIDA SHUHEI

    IPC: H05K3/46

    Abstract: PROBLEM TO BE SOLVED: To reduce through hole connections to be minimum by interconnecting the signal wiring conductors of different wiring layers using via holes formed in interlayer insulating layers. SOLUTION: Wiring layers including wiring layers separated by interlayer insulating layers 28 are formed on one side of a double-sided copper-clad circuit board. The via holes 30 are formed in the interlayer insulating layers 28 and the signal wiring conductors 26 of the different wiring layers are interconnected through the via holes 30. Power potential or ground potential from one side of the double-sided copper-clad circuit board to the other side is interconnected by the through-hole made through the board. Thus, the use of the large through- hole becomes minimum and therefore the size of a circuit package can considerably be reduced.

    SEMICONDUCTOR CHIP, ITS MANUFACTURE AND SEMICONDUCTOR DEVICE IN WHICH SAID CHIP HAS BEEN MOUNTED
    8.
    发明专利
    SEMICONDUCTOR CHIP, ITS MANUFACTURE AND SEMICONDUCTOR DEVICE IN WHICH SAID CHIP HAS BEEN MOUNTED 失效

    公开(公告)号：JPH06338540A

    公开(公告)日：1994-12-06

    申请号：JP12913793

    申请日：1993-05-31

    Applicant: IBM

    Inventor： TSUKADA YUTAKA ,  TSUCHIDA SHUHEI ,  MAEDA YOJI

    IPC: H01L21/60 ,  H01L21/321

    Abstract: PURPOSE: To provide a semiconductor chip, which is high in reliability, is easily mounted on a motherboard, has a low profile, is lightweight and is low in cost, a method of manufacturing the chip and a device mounted with such a semiconductor chip. CONSTITUTION: In a semiconductor device with a support substrate mounted with a semiconductor chip, a constant length of wires 5 are erected on pads 4 on a chip 3 by ball bonding. The base parts of the wires 5 are connected with the pads 4 as ball bonding parts 7. Ball parts 8, consisting of the same material as that for the wires, are respectively formed on the points of the wires 5 by a laser. These ball parts 8 are connected with pads 2 on a substrate 1 through each solder 6, to form the semiconductor device into a semiconductor device 10 mounted with the semiconductor chip 3.

    ELECTRICAL CONNECTION STRUCTURE OF SEMICONDUCTOR DEVICE AND ITS METHOD
    9.
    发明专利
    ELECTRICAL CONNECTION STRUCTURE OF SEMICONDUCTOR DEVICE AND ITS METHOD 失效

    公开(公告)号：JPH06275766A

    公开(公告)日：1994-09-30

    申请号：JP5723793

    申请日：1993-03-17

    Applicant: IBM

    Inventor： TSUKADA YUTAKA ,  KOBAYAKAWA TAIICHI ,  MAEDA YOJI ,  TSUCHIDA SHUHEI

    IPC: H01L23/50 ,  H01L23/498 ,  H05K1/18 ,  H05K3/34

    Abstract: PURPOSE: To provide an electric connecting structure of a semiconductor device for simply electrically and simultaneously mechanically connecting effectively by using a plurality of fine leads at tabs on a substrate mounted with an IC chip and electrodes on a printed circuit board. CONSTITUTION: Leads 120 are fixed at front side and bottom of a substrate 100 via resin tapes 130, 132 and 134. The leads 120 are bent to have circular arc-like protrusions protruding from the same flat surface as the bottom of the substrate in the case of fixing them to the substrate, electrically connected to electrodes 115 on a printed circuit board 110 at the protrusion via solder or conductive adhesive 140, and simultaneously mechanically connected to the substrate and the printed circuit board.

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