公开(公告)号：EP2104136A4

公开(公告)日：2012-03-07

申请号：EP07850933

申请日：2007-12-19

Applicant: IBM

Inventor： OYAMA YUKIFUMI ,  TORIYAMA KAZUSHIGE ,  NISHIWAKI HIDETOSHI ,  ORII YASUMITSU ,  NISHIO TOSHIHIKO

IPC: H01L21/60

CPC classification number: H01L24/13 ,  B23K1/0016 ,  B23K3/0623 ,  B23K2201/40 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/4985 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/13016 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/7515 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/3511 ,  H05K3/3478 ,  H05K2201/0367 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/049 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05599

Abstract: After preliminary supply of an equal amount of solder to all of stud-bumps of a semiconductor part, establishing solder connection between the stud-bumps and connecting pads of a circuit substrate. A method for mounting a semiconductor part on a circuit substrate is provided, which includes the steps of preparing the semiconductor part (10) having a surface thereof provided with a plurality of stud-bumps (12), preparing a solder substrate (13) having a surface thereof on which solid-solders (14) corresponding to respective of the plurality of stud-bumps (12) are arranged, preparing the circuit substrate (20) having a surface thereof provided with connecting pads (21) corresponding to respective of the plurality of stud-bumps, attaching, to respective tip ends of the plurality of stud bumps, the corresponding solid-solders on the solder substrate, separating the solid-solders attached to the tip ends of the stud-bumps from the solder substrate, contacting the solid-solder attached to respective of the tip ends of the stud-bumps with the corresponding connecting pads, and melting the solid-solders contacted with the corresponding connecting pads thereby establishing solder connection between respective of the stud-bumps and the corresponding connecting pads.

公开(公告)号：JP2008078333A

公开(公告)日：2008-04-03

申请号：JP2006254969

申请日：2006-09-20

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： OYAMA YUKIFUMI ,  ORII YASUMITSU ,  NISHIO TOSHIHIKO

IPC: H01L21/304 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18

CPC classification number: H01L21/6835 ,  H01L24/16 ,  H01L24/48 ,  H01L25/16 ,  H01L2221/68359 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01065 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: PROBLEM TO BE SOLVED: To decrease the thickness of a semiconductor part (chip) on a substrate to a specified value, regardless of variation in thickness of a substrate, in a semiconductor product. SOLUTION: In a semiconductor component installed on a base plate 32, a surface 30 of a semiconductor part 29 on a substrate 28 is set at a specified height h from a surface 33 of the base plate 32. By machining the surface 30 of the semiconductor part 29 that has been adjusted to the specified height h, the thickness of the semiconductor part 29 on the substrate 28 is made to be a specified value without exception. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：在半导体产品中，将基板上的半导体部件（芯片）的厚度减小到规定值，而不管基板厚度的变化。 解决方案：在安装在基板32上的半导体部件中，将基板28上的半导体部件29的表面30从基板32的表面33设定在规定的高度h。通过机械加工表面30 已调整到规定高度h的半导体部件29的厚度使基板28上的半导体部件29的厚度成为规定值。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2006165196A

公开(公告)日：2006-06-22

申请号：JP2004353236

申请日：2004-12-06

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： OKABE SHUICHI ,  ORII YASUMITSU ,  ISHIDA MITSUYA

IPC: H01L23/12

CPC classification number: H05K1/112 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05025 ,  H01L2224/05111 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/13025 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/162 ,  H05K1/167 ,  H05K3/062 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/427 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09572 ,  H05K2201/0969 ,  H05K2201/10674 ,  H05K2203/0361 ,  H05K2203/0384 ,  H05K2203/043 ,  Y10T29/49165 ,  H01L2924/00014

Abstract: PROBLEM TO BE SOLVED: To provide a laminated wiring board where the flip chip of an integrated circuit chip can easily be mounted, and a distance from a resistor and a capacitor from the integrated circuit chip can be shortened, and to provide a manufacturing method of the board. SOLUTION: Via holes 20 and 141 to 143, through which the bump electrode 30 of the integrated circuit chip can be inserted are formed at a pitch that is the same as that of the bump electrode 30. Metal films 22 and 23 formed inside the via holes 20 and 141 to 143 and 162 are electrically connected to circuit layers 11, 12, 26 and 27. The built-in capacitor 32 is formed by the prescribed region 101 of a core insulating layer 10 and prescribed regions 112 and 126 of inner circuit layers 11 and 12, which sandwich the region 101 and face each other. The built-in resistor 13 is formed in the inner circuit layer 12. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了提供可以容易地安装集成电路芯片的倒装芯片的层压布线板，并且可以缩短与集成电路芯片的电阻器和电容器的距离，并且提供一种 板的制造方法。 解决方案：集成电路芯片的凸起电极30可以插入的通孔20和141至143以与凸块电极30相同的间距形成。金属膜22和23形成 通孔20和141至143和162内的电路电连接到电路层11,12,26和27.内置电容器32由铁芯绝缘层10的规定区域101和规定区域112和126形成 内层电路层11和12夹着区域101并彼此面对。 内置电阻器13形成在内部电路层12中。（C）2006，JPO＆NCIPI

公开(公告)号：JPH0992682A

公开(公告)日：1997-04-04

申请号：JP24424695

申请日：1995-09-22

Applicant: IBM

Inventor： KODAMA YASUSHI ,  TSUCHIDA SHUHEI ,  TSUKADA YUTAKA ,  ORII YASUMITSU ,  OKUMA HIDEO

IPC: H01L21/60 ,  B23K1/005 ,  B23K1/012 ,  H01L21/603 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To grip a chip by a head to solder keeping the molten solder by with molten. SOLUTION: Solder bumps 3 formed on a chip 1 face the electrodes 11 on a mounting board 10. Then the solder bumps 3 are heated to their melting points by heating a heating block 21 provided on the rear surface side of the chip 1. It is preferable to provide another heating block 22 on the rear surface of the board 10. With the solder bumps 3 molten, the bumps 3 are soldered to the electrodes 11 by bringing the bumps 3 into contact with the electrodes 11.