公开(公告)号：DE2719295A1

公开(公告)日：1977-11-17

申请号：DE2719295

申请日：1977-04-29

Applicant: IBM

Inventor： DAVIS MICHAEL IAN ,  MAYES GARY WAYNE ,  MCDERMOTT THOMAS STEPHEN ,  WISE LARRY EDWARD

IPC: G06F9/40 ,  G06F9/42 ,  G06F9/18 ,  G06F13/06

Abstract: A data processing system is described wherein, during linkage to a subroutine, by a single machine instruction, a complete status save and the assignment of a dynamic work area are effected. By another single machine instruction the process is reversed. The elements of the complete machine status and the dynamic work area are retained in a hardware controlled stack, thus permitting nesting of the subroutine calls.

公开(公告)号：DE2251876A1

公开(公告)日：1973-05-10

申请号：DE2251876

申请日：1972-10-23

Applicant: IBM

Inventor： DAVIS MICHAEL JAN ,  LOFFREDO JOHN MARIO ,  RICKARD PATRICK LEE ,  WISE LARRY EDWARD

IPC: G06F9/46 ,  G06F9/48 ,  G06F13/26 ,  G06F9/18

公开(公告)号：AU4746472A

公开(公告)日：1974-04-11

申请号：AU4746472

申请日：1972-10-05

Applicant: IBM

Inventor： DAVIS MICHAEL IAN ,  LOFFREDO JOHN MARIO ,  RICKARD PATRICK LEE ,  WISE LARRY EDWARD

IPC: G06F9/46 ,  G06F9/48 ,  G06F13/26 ,  C06F3/06

公开(公告)号：HK71084A

公开(公告)日：1984-09-21

申请号：HK71084

申请日：1984-09-13

Applicant: IBM

Inventor： DAVIS MICHAEL LAN ,  MAYES GARY WAYNE ,  MCDERMOTT THOMAS STEPHEN ,  WISE LARRY EDWARD

IPC: G06F9/40 ,  G06F9/42 ,  G06F9/06

Abstract: A data processing system is described wherein, during linkage to a subroutine, by a single machine instruction, a complete status save and the assignment of a dynamic work area are effected. By another single machine instruction the process is reversed. The elements of the complete machine status and the dynamic work area are retained in a hardware controlled stack, thus permitting nesting of the subroutine calls.

公开(公告)号：AU2474977A

公开(公告)日：1978-11-09

申请号：AU2474977

申请日：1977-05-02

Applicant: IBM

Inventor： BIRNEY RICHARD EUGENE ,  DAVIS MICHAEL IAN ,  HOOD ROBERT ALLEN ,  MCDERMOTT THOMAS STEPHEN ,  WISE LARRY EDWARD

IPC: G06F12/06 ,  G06F12/14 ,  G06F13/06

Abstract: System mode controls for obtaining limited addressability for supervisor programming operations without disturbing a user address key currently contained in a user key register (UKR).

公开(公告)号：CH613789A5

公开(公告)日：1979-10-15

申请号：CH533077

申请日：1977-04-28

Applicant: IBM

Inventor： BIRNEY RICHARD EUGENE ,  DABIS MICHAEL IAN ,  GRAYBIEL LYNN ALLAN ,  HOOD ROBERT ALLEN ,  KAHN SAMUEL ,  OSBORNE WILLIAM STEESE ,  MCDERMOTT THOMAS STEPHEN ,  WISE LARRY EDWARD

IPC: G06F9/312 ,  G06F12/14 ,  G06F13/12 ,  G06F9/06

Abstract: In the data processing system, one section each (32, 33, 34, 35) of a key register is provided for different types of memory access. A selection circuit (20), the data inputs of which are connected to the key register sections and the control inputs of which are connected to memory access selection signal lines (22, 23, 24, 25) of one or more processors, can be used to select an active memory access key in each case, depending on the type of access. An additional section (31) of the key register is provided for cycle-stealing accesses (memory accesses by a peripheral device without formal program interrupt) and connected to a data input of the selection circuit (20) so that an active memory access key can be selected by means of access signals on a selection signal line (21), connected to another control input of the selection circuit, of an input/output channel mechanism, also including I/O cycle stealing accesses.

公开(公告)号：DE2717654A1

公开(公告)日：1977-11-10

申请号：DE2717654

申请日：1977-04-21

Applicant: IBM

Inventor： BIRNEY RICHARD EUGENE ,  DAVIS MICHAEL IAN ,  HOOD ROBERT ALLEN ,  MCDERMOTT THOMAS STEPHEN ,  WISE LARRY EDWARD

IPC: G06F12/14 ,  G06F11/00

Abstract: The storage protection control system combines a storage protect key stack with an access key register (AKR) and active access key (AAK) select circuits. Storage key entries in the stack correspond to the physical blocks in the main memory, to provide storage protection for different storage access types within address sub-ranges in the main memory associated with respective access keys. The sub-ranges are blocks of addresses within the full range of addresses of the physical memory. The protect key operation applies to physical addresses, and it obtains system addressing compatibility with an address translation operation using the same access keys as address keys with program logical addresses.