Abstract:
In one aspect the invention provides a signal bearing medium tangibly embodying a program of machine-readable instructions that are executable by a digital processing apparatus to perform operations to determine a maintenance fee for a data storage system. The operations include monitoring at least one data storage device during operation of the data storage system to determine a duty cycle and determining a current value of the maintenance fee based at least in part on the determined duty cycle. In a further disk drive-based embodiment the operations may include, or be instead, determining a disk drive redundancy configuration of disk drives of a data storage system. The operations then compare the determined duty cycle to a threshold value and assert a redundancy configuration change signal based on the result of the comparison. For a RAID configuration embodiment having a RAID level, the asserting operation asserts a RAID level change signal based on the result of the comparison.
Abstract:
A data management system has at least one class distinction cue associated with a class of data entities. The class distinction cue comprises data management guidance information and priority information related to the associated class of data entities. For a data entity, at run-time, a data management allocation run-time system references the class distinction cue or cues prior to conducting data management allocation or access, and, based on the priority information as compared to other priority information related to the data storage resources, selectively allocates the data storage resources and provides the operations of the storage system in the data management allocation system for the data entity.
Abstract:
The look ahead circuits are for an address relocation translator which contains stacks of segmentation registers (SR's), each of which may be loaded with an assigned address of a physical block in a main memory. An additional pair of bit positions are provided with each SR to receive look ahead bits from decoder loading circuits which decode a physical address being loaded into the SR to indicate the storage unit containing the addressed block. During each subsequent address translation the loaded look ahead bits are outgated while the block address is being read from an SR. The look ahead bits are decoded for selecting the required storage unit component of the main memory, and a translator interface is switched to that unit. The look ahead bits are handled by parallel high speed circuits so that the required storage unit is selected before a storage unit cycle is generated by the translator for accessing the addressed block.
Abstract:
In one aspect the invention provides a signal bearing medium tangibly embodying a program of machine-readable instructions that are executable by a digital processing apparatus to perform operations to determine a maintenance fee for a data storage system. The operations include monitoring at least one data storage device during operation of the data storage system to determine a duty cycle and determining a current value of the maintenance fee based at least in part on the determined duty cycle. In a further disk drive-based embodiment the operations may include, or be instead, determining a disk drive redundancy configuration of disk drives of a data storage system. The operations then compare the determined duty cycle to a threshold value and assert a redundancy configuration change signal based on the result of the comparison. For a RAID configuration embodiment having a RAID level, the asserting operation asserts a RAID level change signal based on the result of the comparison.
Abstract:
A data management system has at least one class distinction cue associated with a class of data entities. The class distinction cue comprises data management guidance information and priority information related to the associated class of data entities. For a data entity, at run-time, a data management allocation run-time system references the class distinction cue o r cues prior to conducting data management allocation or access, and, based on the priority information as compared to other priority information related t o the data storage resources, selectively allocates the data storage resources and provides the operations of the storage system in the data management allocation system for the data entity.
Abstract:
System mode controls for obtaining limited addressability for supervisor programming operations without disturbing a user address key currently contained in a user key register (UKR).
Abstract:
In a data processing system with translation of the logic addresses, predetermined in the programs, into the physical addresses necessary for memory access, special devices are provided by means of which flexible allocation of address areas for various categories of information or various types of programs is possible. The address translator arrangement has a separate translator unit (stack 0... stack 7) for each address area. In addition, an arrangement (20...35) for storing various address keys for various categories of information and for outputting one of these keys each on the basis of present memory access control signals is provided. One of the translator units is then in each case selected with the aid of the output address key by means of an additional selection device (40). This makes it possible to obtain different physical addresses from the same logic address during the translation, dependently on which category of information is to be accessed at the time and dependently on the address key in each case allocated to the category of information.