公开(公告)号：WO02082286A2

公开(公告)日：2002-10-17

申请号：PCT/GB0201484

申请日：2002-03-28

Applicant: IBM ,  IBM UK ,  CIT ALCATEL

Inventor： BARRI PETER ,  CALVIGNAC JEAN ,  HEDDES MARCO ,  LOGAN JOSEPH ,  NIEMEGEERS ALEX ,  VERPLANKEN FABRICE ,  VRANA MIROSLAV

IPC: G06F12/00 ,  G06F13/16 ,  G06F13/18

CPC classification number: G06F13/18 ,  G06F13/161

Abstract: A Network Processor (NP) includes a controller that allows maximum utilization of the memory. The controller includes a memory arbiter that monitors memory access requests from requesters in the NP and awards high priority requesters all the memory bandwidth requested per access to the memory. If the memory bandwidth requested by the high priority requester is less than the full memory bandwidth, the difference between the requested bandwidth and full memory bandwidth is assigned to lower priority requesters. By so doing every memory access utilizes the full memory bandwidth.

Abstract translation: 网络处理器（NP）包括允许最大限度利用存储器的控制器。 控制器包括一个内存仲裁器，用于监视NP中请求者的内存访问请求，并授予高优先级请求者每次访问存储器所请求的所有内存带宽。 如果高优先级请求者请求的存储器带宽小于全部存储器带宽，则请求的带宽和全部存储器带宽之间的差异被分配给较低优先权请求者。 通过这样做，每个存储器访问都利用了完整的存储器带宽。

公开(公告)号：AT300763T

公开(公告)日：2005-08-15

申请号：AT02708513

申请日：2002-03-28

Applicant: IBM ,  CIT ALCATEL

Inventor： BARRI PETER ,  CALVIGNAC JEAN ,  HEDDES MARCO ,  LOGAN JOSEPH ,  NIEMEGEERS ALEX ,  VERPLANKEN FABRICE ,  VRANA MIROSLAV

IPC: G06F12/00 ,  G06F13/16 ,  G06F13/18

Abstract: A Network Processor (NP) includes a controller that allows maximum utilization of the memory. The controller includes a memory arbiter that monitors memory access requests from requesters in the NP and awards high priority requesters all the memory bandwidth requested per access to the memory. If the memory bandwidth requested by the high priority requester is less than the full memory bandwidth, the difference between the requested bandwidth and full memory bandwidth is assigned to lower priority requesters. By so doing every memory access utilizes the full memory bandwidth.

公开(公告)号：EP0810809A3

公开(公告)日：1998-12-16

申请号：EP97480016

申请日：1997-04-08

Applicant: IBM

Inventor： CALVIGNAC JEAN ,  ORSATTI DANIEL ,  VERPLANKEN FABRICE

IPC: H04L12/54 ,  H04L12/70 ,  H04L12/863 ,  H04L12/911 ,  H04L12/935 ,  H04Q11/04 ,  H04L12/56

CPC classification number: H04L47/72 ,  H04L12/5602 ,  H04L47/50 ,  H04L47/6265 ,  H04L49/3081 ,  H04L2012/5636 ,  H04L2012/5645 ,  H04L2012/5651 ,  H04L2012/5679 ,  H04L2012/568 ,  H04Q11/0478

Abstract: The invention discloses a method and an apparatus for use in the packet networks and particularly Asynchronous Transfer Mode (ATM) networks to support traffic of connections requiring a minimum bandwidth at connection establishment. The method and the apparatus further support any mixed traffic including connections requiring a minimum bandwidth, a fixed reserved bandwidth or no bandwidth at connection establishment.
The invention consists in using a first scheduler triggered by absolute time for scheduling the Minimum Service connections up to a rate corresponding to their reserved minimum bandwidth reserved, a second scheduler and a queue of Minimum Service connection identiers for communication between the two scheduling schemes.
With the
dual scheduling mechanism of the invention the minimum bandwidth for connections reserving a minimum bandwidth at connection establishment is guaranteed in each point of the connection path and at any time, the level of fairness of the remaining bandwidth sharing depending on the quality of the second scheduler.

公开(公告)号：JPH1051472A

公开(公告)日：1998-02-20

申请号：JP12519797

申请日：1997-05-15

Applicant: IBM

Inventor： CALVIGNAC JEAN ,  ORSATTI DANIEL ,  VERPLANKEN FABRICE

IPC: H04Q3/00 ,  H04L12/28

Abstract: PROBLEM TO BE SOLVED: To reserve irreducible bandwidth when connection is established and perform transmission and reception, and improve the efficiency of a network by scheduling received packets at a packet network node under control over an absolute time according to a speed corresponding to the reserved bandwidth. SOLUTION: A dedicated minimum service connection is expected with a queue 101 specified by a search mechanism 100, the connection queue is scheduled by a shaper unit 111 according to the speed corresponding to the reserved bandwidth by controlling the absolute time 190, and a queue identifier is stored. Then the identifier is read out and the starting packet of the corresponding queue is transmitted. While there is a free cell space, a priority mechanism function 178 performs ready identifier queue resetting out of a queue group 174, also preforms queue resetting from a minimum service connection queue 15 corresponding to the identifier, and fills a cell space 170 with ready cells.

公开(公告)号：DE602006007827D1

公开(公告)日：2009-08-27

申请号：DE602006007827

申请日：2006-03-15

Applicant: IBM

Inventor： BASSO CLAUDE ,  CALVIGNAC JEAN ,  CHANG CHIH-JEN ,  DAMON PHILIPPE ,  VAIDHYANATHAN NATARAJAN ,  VERPLANKEN FABRICE ,  VERRILLI COLIN BEATON

IPC: H04L29/06

Abstract: A method for reducing latency in a host Ethernet adapter (HEA) includes the following. First, the HEA receives a packet with an internet protocol (IP) header and data in the HEA. The HEA parses a connection identifier from the IP header and accesses a negative cache in the HEA to determine if the connection identifier is not in a memory external to the HEA. The HEA applies a default treatment to the packet if the connection identifier is not in the memory, thereby reducing latency by decreasing access to the memory.

公开(公告)号：DE69735608D1

公开(公告)日：2006-05-18

申请号：DE69735608

申请日：1997-04-08

Applicant: IBM

Inventor： CALVIGNAC JEAN ,  ORSATTI DANIEL ,  VERPLANKEN FABRICE

IPC: H04Q11/04 ,  H04L12/28 ,  H04L12/56

公开(公告)号：DE60033529T2

公开(公告)日：2007-11-15

申请号：DE60033529

申请日：2000-08-24

Applicant: IBM

Inventor： BASS BRIAN ,  CALVIGNAC JEAN ,  HEDDES MARCO ,  PATEL PIYUSH ,  REVILLA JUAN ,  SIEGEL MICHAEL ,  VERPLANKEN FABRICE

IPC: G06F15/16 ,  G06F15/167 ,  G06F12/00 ,  G06F12/06 ,  G06F13/16 ,  G06F15/177 ,  H04L12/56 ,  H04Q11/04

Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a plurality of memory elements and a plurality of interface processors formed on a semiconductor substrate. The memory elements and interface processors together form a network processor capable of cooperating with other elements in executing instructions directing the flow of data in a network. Access to the memory elements is controlled in a particular manner and under operative rules which provide controlled multiple accesses of the plurality of memory elements by the plurality of processors.

公开(公告)号：DE60205231T2

公开(公告)日：2006-05-24

申请号：DE60205231

申请日：2002-03-28

Applicant: ALCATEL SA ,  IBM

Inventor： BARRI PETER ,  CALVIGNAC JEAN ,  HEDDES MARCO ,  LOGAN JOSEPH ,  NIEMEGEERS ALEX ,  VERPLANKEN FABRICE ,  VRANA MIROSLAV

IPC: G06F12/00 ,  G06F13/16 ,  G06F13/18

Abstract: A Network Processor (NP) includes a controller that allows maximum utilization of the memory. The controller includes a memory arbiter that monitors memory access requests from requesters in the NP and awards high priority requesters all the memory bandwidth requested per access to the memory. If the memory bandwidth requested by the high priority requester is less than the full memory bandwidth, the difference between the requested bandwidth and full memory bandwidth is assigned to lower priority requesters. By so doing every memory access utilizes the full memory bandwidth.

公开(公告)号：AU2002242874A1

公开(公告)日：2002-10-21

申请号：AU2002242874

申请日：2002-03-28

Applicant: IBM

Inventor： VRANA MIROSLAV ,  CALVIGNAC JEAN ,  VERPLANKEN FABRICE ,  BARRI PETER ,  LOGAN JOSEPH ,  HEDDES MARCO ,  NIEMEGEERS ALEX

IPC: G06F12/00 ,  G06F13/16 ,  G06F13/18

Abstract: A Network Processor (NP) includes a controller that allows maximum utilization of the memory. The controller includes a memory arbiter that monitors memory access requests from requesters in the NP and awards high priority requesters all the memory bandwidth requested per access to the memory. If the memory bandwidth requested by the high priority requester is less than the full memory bandwidth, the difference between the requested bandwidth and full memory bandwidth is assigned to lower priority requesters. By so doing every memory access utilizes the full memory bandwidth.

公开(公告)号：DE69329709D1

公开(公告)日：2001-01-04

申请号：DE69329709

申请日：1993-04-29

Applicant: IBM

Inventor： BASSO CLAUDE ,  CALVIGNAC JEAN ,  GALAND CLAUDE ,  GIROIRD DIDIER ,  VERPLANKEN FABRICE

IPC: G06F13/00 ,  G06F15/16 ,  G06F15/177 ,  H04L12/18

Abstract: A communications system comprises a memory which is shared by a plurality of users, each one receiving and transmitting messages to each other. In the present system, a message is composed of a plurality of data buffers stored in the memory and each data buffer is controlled and mapped to a unique direct control block (DCB) which stores the characteristics of said data buffer. The chaining of the DCB forms the whole message which may be multicast to a plurality of users. Therefore, in order to improve the performance of such communications system, one may duplicate the message as many times as necessary without re-writing the data in the personal storage of each user by using an indirect control block (ICB) which represents the message duplicated. Each ICB stores the characteristics of the message duplicated and points to a DCB. A field in the DCB enables to count the number of duplication of the message. The DCB and ICB stores different fields which are required in order to perform the operations of lease control block from the free queues, the operations of message enqueue in the user queue, the operations of message dequeue from the user queue, and the operations of message release to the free queues. Two separate free queues FDCBQ and FICBQ chaining the free DCB and ICB are provided and are controlled by two control blocks FDQCB and FIQCB. The present apparatus and method may also be used for multicasting data buffer which composes a message by adding new fields in the ICB. In this case, the message to be multicast may have a content different from the original one, which requires therefore that to each ICB correspond a unique DCB.