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    ENCASING ARRANGEMENT FOR A SEMICONDUCTOR COMPONENT
    2.
    发明申请
    ENCASING ARRANGEMENT FOR A SEMICONDUCTOR COMPONENT 审中-公开
    半导体组件的壳体结构

    公开(公告)号：WO0145166A3

    公开(公告)日：2002-04-11

    申请号：PCT/DE0004437

    申请日：2000-12-13

    Applicant: INFINEON TECHNOLOGIES AG ,  MUFF SIMON ,  WANNINGER FRIEDRICH ,  POHL JENS ,  HAUSER CHRISTIAN

    Inventor： MUFF SIMON ,  WANNINGER FRIEDRICH ,  POHL JENS ,  HAUSER CHRISTIAN

    IPC: H01L23/31 ,  H01L23/367 ,  H01L23/498

    CPC classification number: H01L24/32 ,  H01L23/3107 ,  H01L23/3677 ,  H01L2224/27013 ,  H01L2224/83051 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025

    Abstract: The invention relates to an encasing arrangement for a semi-conductor component, which comprises a semi-conductor chip (2), a circuit board (8), upon which the semi-conductor component (1) is mounted and a support layer (3), arranged between the semi-conductor chip (2) and the circuit board (8) for rewiring the wiring connectors (11) for the semi-conductor chip (2) on the circuit board (8). The support layer (3) is linked to the circuit board (8), by means of soldered connections (6) and a filler (4) serves to mechanically connect the semi-conductor chip (2) and the soldered connections (6). A metal layer (5) is arranged on the support layer (3), which is connected to soldered connections (6). At least one shaped element (7), made of thermally conductive material, is arranged on the metal layer (5) and is thermally connected to the metal layer (5). The encasing arrangement thus achieves an improved conductivity of the power loss from the incorporated semi-conductor chip (2), which is to be drained off, whereby the desired mechanical properties of the encasing arrangement are maintained.

    Abstract translation: 一个半导体封装的壳体组件包括一个半导体芯片（2），一个印刷电路板（8），被放置在半导体芯片（1）上，和（3）介于上述半导体芯片（2）和电路板（8）布置之间的支撑层， 用于在印刷电路板重新布线的半导体芯片（2）的接线端子（11）（8）。 所述支撑层（3）通过焊接点连接（6），连接到所述电路板（8），和填料的半导体芯片（2）和载体层之间的（3）被用于将半导体芯片（2）和所述焊料的机械去耦（（4） 6）。 到载体层（3）的金属层（5）施加焊料（6）连接。 到金属层（5）是由散热材料制成的模制元件（7）至少施加，其热传导与金属层（5）相连接。 其特征在于所述壳体组件中的耗散功率损失的改进的导电性的内置半导体芯片（2），其中，所述壳体组件的所期望的机械性能以接收bleiden。

    5.
    发明专利
    未知

    公开(公告)号：DE10024376A1

    公开(公告)日：2001-12-06

    申请号：DE10024376

    申请日：2000-05-17

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： WINDERL JOHANN ,  HAUSER CHRISTIAN ,  REISS MARTIN ,  MUENCH THOMAS ,  NEU ACHIM

    IPC: H01L23/31 ,  H01L23/16 ,  H01L21/00 ,  H01L23/50 ,  H01L21/56

    Abstract: The invention relates to a semi-conductor component, comprising a semi-conductor chip having contact pads on the first main surface area thereof. A wiring film is applied to the first main surface area, avoiding the contact pads. On the opposite side of the first main side of the semi-conductor chip, said wiring film has a solder stop mask which covers the conductors. Contact pads lying in at least one groove are wired to the adjacent ends of the conductors in order to connect the contact pads to the soldering contacts lying in the grooves of the solder stop mask. Each wire connection and the end of the conductor thereof is enveloped by a casting material. Said solder stop mask comprises at least one depression and one rise, enabling the casting material to be spread in a directed manner when applied to the semi-conductor component.

    7.
    发明专利
    未知

    公开(公告)号：DE19960246A1

    公开(公告)日：2001-07-05

    申请号：DE19960246

    申请日：1999-12-14

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： MUFF SIMON ,  POHL JENS ,  WANNINGER FRIEDRICH ,  HAUSER CHRISTIAN

    IPC: H01L23/31 ,  H01L23/367 ,  H01L23/36 ,  H01L23/12 ,  H01L23/50 ,  H01L23/16

    Abstract: The invention relates to an encasing arrangement for a semi-conductor component, which comprises a semi-conductor chip (2), a circuit board (8), upon which the semi-conductor component (1) is mounted and a support layer (3), arranged between the semi-conductor chip (2) and the circuit board (8) for rewiring the wiring connectors (11) for the semi-conductor chip (2) on the circuit board (8). The support layer (3) is linked to the circuit board (8), by means of soldered connections (6) and a filler (4) serves to mechanically connect the semi-conductor chip (2) and the soldered connections (6). A metal layer (5) is arranged on the support layer (3), which is connected to soldered connections (6). At least one shaped element (7), made of thermally conductive material, is arranged on the metal layer (5) and is thermally connected to the metal layer (5). The encasing arrangement thus achieves an improved conductivity of the power loss from the incorporated semi-conductor chip (2), which is to be drained off, whereby the desired mechanical properties of the encasing arrangement are maintained.

    9.
    发明专利
    未知

    公开(公告)号：DE10014304B4

    公开(公告)日：2007-08-02

    申请号：DE10014304

    申请日：2000-03-23

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： REIS MARTIN ,  WINDERL JOHANN ,  NEU ACHIM ,  HAUSER CHRISTIAN ,  NEUMAYER MARTIN

    IPC: H01L23/31 ,  H01L23/50

    Abstract: A semiconductor component includes a semiconductor chip having contact pads on its main face, and a wiring foil, in which are recesses for the contact pads, applied to the main face. The foil has conductor tracks on a side facing away from the main side. The conductor tracks connect the contact pads to solder contacts. The contact pads located in the recess are electrically connected via wire connections to adjacent conductor track ends. Each wire connection is surrounded with a sealing compound of a first and a second layer. A method for manufacturing a semiconductor component includes applying wiring foil to a main side of the chip, producing the wire connection between contact pads and adjacent conductor track ends, applying sealing compound to locations on the recess to completely cover the wire connection with the sealing compound, and only curing the surface of the sealing compound.

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