Abstract:
The invention relates to a method for producing a trench capacitor. According to said method, after the trench has been formed, an insulating layer (35) is first deposited, from which the insulation collar (75) is subsequently to be formed. The trench (10) is then partially filled with a sacrificial fill material (40) and a thin structural layer (55) is deposited thereon. Spacers are formed from said layer which cover the insulating layer (35) in the upper region (45) of the trench (10). The sacrificial fill material (40) and the insulating layer (35) are then removed completely in the lower region (50) of the trench (10). The insulation collar (75) is thus formed in the upper region (45) of the trench (10).
Abstract:
Method for fabricating a barrier layer having the following steps, namely oxidation of a substrate (1) composed of silicon in order to produce a substrate oxide (2) on the surface of the substrate (1); production of an oxygen-impervious layer (4) at the interface between the substrate oxide layer (2) and the substrate (1), the oxygen-impervious layer (4), as barrier, preventing the formation of metal silicide compounds between applied metal and the substrate silicon; etching of the substrate oxide layer (2) until the underlying oxygen-impervious layer (4) is uncovered.
Abstract:
One embodiment of the invention relates to a method for forming trench memory cell structures having trench capacitors and planar selection transistors. An implantation for forming a reinforcement implant for improving the electrical connection of a storage electrode of a trench capacitor to a first source/drain zone of the respective selection transistor is effected in a self-aligned manner with respect to gate stacks provided above a substrate surface of the semiconductor substrate. In order to form the reinforcement implant, the deposition process for a first insulator layer, from which dielectric spacer structures of the gate stacks emerge, is divided into at least two substeps, the implantation being preceded by application of a base layer of the first insulator layer, the layer thickness of which defines the distance between the reinforcement implant and the gate stacks. A covering layer of the first insulator layer that is provided after the implantation improves the dielectric properties of the spacer structures which insulate the gate stacks from bit contact structures to be provided between the gate stacks.
Abstract:
Production of a barrier layer comprises oxidizing silicon substrate (1) to produce substrate oxide (2) on the substrate surface, forming oxygen-impermeable layer (4) on boundary surface between substrate oxide layer and substrate, and etching substrate oxide layer until the oxygen-impermeable layer underneath is exposed. Preferred Features: The oxygen-impermeable layer is formed as a barrier to prevent the formation of metal silicide compounds between the applied metal and the silicon substrate. The oxygen-impermeable layer is produced while nitrogen ions are implanted in the substrate. The substrate oxide is subjected to a nitrogen gas, N2O gas, a NO gas or ammonia. Etching is a wet chemical or dry etching process.
Abstract:
A trench capacitor is formed with an insulation collar. After the formation of the trench, firstly an insulating layer is deposited, from which layer the insulation collar will be subsequently formed. Afterward, the trench is partly filled with a sacrificial filling material and a thin patterning layer is deposited thereon. Spacers are formed from that layer and cover the insulating layer in the upper region of the trench. Afterward, the sacrificial filling material and the insulating layer are completely removed in the lower region of the trench. As a result, the insulation collar is produced in the upper region of the trench.
Abstract:
Production of a side wall spacer in a trench (2) etched in a substrate (1) using an etching mask comprises: depositing a dielectric layer (5) thickly on the etching mask and thinly on the base of the trench; isotropically back etching the deposited layer; and anisotropically etching the back-etched layer. Preferred Features: Isotropic back etching is carried out using a wet chemical or a dry chemical method. Anisotropic etching is carried out by reactive ion etching.
Abstract:
Eliminating morphological and crystallographic defects in semiconductor surfaces comprises producing a semiconductor substrate having COPs having a sub-critical average size; and surface treating the substrate by activating and tempering for a short time and at elevated temperature. The temperature and time are selected so that morphological and crystallographic defects in the activated surface of the substrate are compared and defects in the volume of the substrate remain unchanged. An Independent claim is also included for a microchip produced from the semiconductor substrate. Preferred Features: The surface of the substrate is cleaned before being surface treated. The surface is activated using low energy ions, especially hydrogen, helium, silicon or argon ions. Tempering is carried out at less than 1200, preferably 600-1200, especially 600-800 deg C.
Abstract:
The production of a semiconductor structure comprises preparing a semiconductor substrate (1) having a trench (5), filling the trench with a first material (10') forming a hole in the material, back-etching the first material in the trench to opening the hole and forming a recess in a surface of the first material, filling the trench with a second material (50), and back-etching the second material in the trench.