中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

77 records (took 0.025 seconds)

    3.
    发明专利
    未知

    公开(公告)号：DE102004022425A1

    公开(公告)日：2005-12-01

    申请号：DE102004022425

    申请日：2004-05-06

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： PROELL MANFRED ,  KLIEWER JOERG ,  SCHNEIDER RALF ,  SCHROEDER STEPHAN

    IPC: G05F1/595 ,  G11C5/14 ,  G11C7/00 ,  G11C11/4074

    Abstract: An integrated circuit includes an input terminal (IN) for application of a supply voltage (Vext) and an output terminal (A) for generation of an output voltage (Vout). A first branch including a first controllable resistance (T 1 ) and a second branch including a charge pump ( 10 ) and a second controllable resistance (T 2 ) are connected between the input terminal (IN) and the output terminal (A). A control circuit ( 20 ) alters the resistance values of the first and second controllable resistances (T 1 , T 2 ) in a manner dependent on a ratio of an actual value (Vout) of the output voltage to a desired value (VSout) of the output voltage and a ratio of an actual value (Vext) of the supply voltage to a desired value (VSext) of the supply voltage. As a result, the output voltage (Vout) can be stabilized to the desired value (VSout) virtually independently of fluctuations of the supply voltage.

    5.
    发明专利
    未知

    公开(公告)号：DE10358038A1

    公开(公告)日：2005-07-21

    申请号：DE10358038

    申请日：2003-12-11

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SCHNEIDER RALF ,  SCHROEDER STEPHAN ,  PROELL MANFRED ,  AUGE JUERGEN

    IPC: G11C7/00 ,  G11C11/407 ,  G11C16/04 ,  G11C29/44

    Abstract: An integrated circuit includes a programming circuit ( 10 ) for generating programming signals (PS 1 , . . . , PS 4 ) with a first input terminal (E 1 ) for applying a control voltage (ES), a second input terminal (E 2 ) for applying a reference voltage (Vref), a storage circuit ( 30 ) with programmable switches ( 35, . . . , 38 ) and output terminals (A 1 , . . . , A 4 ). The programming circuit in each case generates a programming signal (PS 1 , . . . , PS 4 ) when the control voltage (ES) exceeds a predefined threshold voltage formed from the reference voltage. The number of programming signals (PS 1 , . . . , PS 4 ) is dependent on the magnitude of the threshold voltage exceeded by the control voltage (ES). The programming signals are used for programming the programmable switches ( 35, . . . , 38 ). The programming state of the programmable switches can be read out via the output terminals (A 1 , . . . , A 4 ) of the integrated circuit. The integrated circuit enables the storage of external operating parameters of the integrated circuit.

    6.
    发明专利
    未知

    公开(公告)号：DE10323501B4

    公开(公告)日：2005-03-10

    申请号：DE10323501

    申请日：2003-05-23

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BENZINGER HERBERT ,  PROELL MANFRED ,  SCHROEDER STEPHAN ,  ZANDEN KOEN VAN DER

    IPC: G11C5/14 ,  G11C7/04 ,  G11C7/06 ,  G11C7/12 ,  G11C11/34 ,  G11C11/4074 ,  G11C11/409 ,  G11C11/4091

    Abstract: A circuit arrangement for setting a voltage supply for a read/write amplifier of an integrated memory has a first voltage generator circuit for generating a supply voltage for application to the read/write amplifier during an assessment and amplification operation and a second voltage generator circuit for generating a precharge voltage for precharging bit lines of the memory which are connected to the read/write amplifier. A temperature detector circuit, which is connected to the first voltage generator circuit, is used to detect a temperature of the memory and interacts with the first voltage generator circuit to set the supply voltage applied to the read/write amplifier in a manner depending on a temperature of the memory.

    7.
    发明专利
    未知

    公开(公告)号：DE10311373B4

    公开(公告)日：2005-02-24

    申请号：DE10311373

    申请日：2003-03-14

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SCHROEDER STEPHAN ,  KLIEWER JOERG ,  CAMPENHAUSEN AUREL VON ,  PROELL MANFRED

    IPC: G11C7/00 ,  G11C29/00 ,  G11C29/44

    Abstract: An integrated memory has individually addressable normal and redundant units of memory cells. A memory unit is used to store, in a normal mode, an address for one of the normal units which needs to be replaced by one of the redundant units. A comparison unit compares an address which is present on an address bus with an address stored in the memory unit and activates one of the redundant units in the event of a match being identified. The memory also has a test circuit which can be activated by a test mode signal, can reset the memory unit to an initial state, and can store an address for one of the redundant units in the memory unit for subsequently writing an identification code to this redundant unit.

    8.
    发明专利
    未知

    公开(公告)号：DE10323501A1

    公开(公告)日：2004-12-30

    申请号：DE10323501

    申请日：2003-05-23

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BENZINGER HERBERT ,  PROELL MANFRED ,  SCHROEDER STEPHAN ,  ZANDEN KOEN VAN DER

    IPC: G11C5/14 ,  G11C7/04 ,  G11C7/06 ,  G11C7/12 ,  G11C11/34 ,  G11C11/4074 ,  G11C11/409 ,  G11C11/4091

    Abstract: A circuit arrangement for setting a voltage supply for a read/write amplifier of an integrated memory has a first voltage generator circuit for generating a supply voltage for application to the read/write amplifier during an assessment and amplification operation and a second voltage generator circuit for generating a precharge voltage for precharging bit lines of the memory which are connected to the read/write amplifier. A temperature detector circuit, which is connected to the first voltage generator circuit, is used to detect a temperature of the memory and interacts with the first voltage generator circuit to set the supply voltage applied to the read/write amplifier in a manner depending on a temperature of the memory.

    9.
    发明专利
    未知

    公开(公告)号：DE10301856A1

    公开(公告)日：2004-08-05

    申请号：DE10301856

    申请日：2003-01-17

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： CAMPENHAUSEN AUREL VON ,  PROELL MANFRED ,  BENZINGER HERBERT ,  SCHROEDER STEPHAN

    IPC: G11C11/4097 ,  G11C11/404 ,  G11C7/18 ,  G11C5/02

    Abstract: An integrated memory can include a memory cell array, which has word lines for the selection of memory cells, bit lines for reading out or writing data signals of the memory cells, and a sense amplifier connected to bit lines of a bit line pair at one end of the bit line pair. In an activated state during a memory access, at least one activatable isolation circuit which is switched into one of the bit line pairs can isolate a part of the bit line pair, which is more remote from the sense amplifier from the sense amplifier. As a result, the effective capacitance of the bit lines can be significantly reduced during the memory access.

Patent Agency Ranking