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    2.
    发明专利
    未知

    公开(公告)号：DE102004022326B4

    公开(公告)日：2008-04-03

    申请号：DE102004022326

    申请日：2004-05-06

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： WIRKER BJOERN ,  PROELL MANFRED ,  KLIEWER JOERG ,  VAN DER ZANDEN KOEN

    IPC: G11C29/02 ,  G11C7/12 ,  G11C8/00 ,  G11C11/4091 ,  G11C29/00 ,  G11C29/50 ,  G11C29/56

    Abstract: An integrated semiconductor memory can be operated in a normal operating state synchronously with a control clock. In the test operating state, the integrated semiconductor memory is driven synchronously with a clock edge of the control clock with a first control signal and starts a test run independent of the control clock. Driving with the first control signal, selection transistors in a memory bank that can be selected by a memory bank address are turned off. Afterward, bit lines in the selected memory bank are interconnected and driven with a predetermined precharge potential. After a precharge time has elapsed, one of the word lines is selected by an applied word line address and the selection transistors in the selected memory bank connected to the selected word line are turned on. Precharge times are set and tested independently of the clock period of the control clock.

    3.
    发明专利
    未知

    公开(公告)号：DE102004022327B4

    公开(公告)日：2006-04-27

    申请号：DE102004022327

    申请日：2004-05-06

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： AUGE JUERGEN ,  PROELL MANFRED ,  SCHROEPPEL FRANK ,  KLIEWER JOERG

    IPC: G11C29/00 ,  G11C7/00 ,  G11C29/48

    Abstract: An integrated semiconductor memory includes a memory cell array with at least one memory cell, in which a data value is stored, and an evaluation circuit with a counter. During a test of the integrated semiconductor memory, a counter reading of the counter is altered if the data value stored in the memory cell deviates from a desired value. A threshold value is predefined by a control circuit. A programming circuit compares the threshold value on the input side with the instantaneous counter reading of the counter. If the counter reading of the counter exceeds the threshold value, a programming element changes from a first programming state to a second programming state. After the conclusion of the test, the state of the programming element is read out via an output terminal. This scheme makes it possible to deduce a possible cause of failure of the integrated semiconductor memory.

    4.
    发明专利
    未知

    公开(公告)号：DE102004022425A1

    公开(公告)日：2005-12-01

    申请号：DE102004022425

    申请日：2004-05-06

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： PROELL MANFRED ,  KLIEWER JOERG ,  SCHNEIDER RALF ,  SCHROEDER STEPHAN

    IPC: G05F1/595 ,  G11C5/14 ,  G11C7/00 ,  G11C11/4074

    Abstract: An integrated circuit includes an input terminal (IN) for application of a supply voltage (Vext) and an output terminal (A) for generation of an output voltage (Vout). A first branch including a first controllable resistance (T 1 ) and a second branch including a charge pump ( 10 ) and a second controllable resistance (T 2 ) are connected between the input terminal (IN) and the output terminal (A). A control circuit ( 20 ) alters the resistance values of the first and second controllable resistances (T 1 , T 2 ) in a manner dependent on a ratio of an actual value (Vout) of the output voltage to a desired value (VSout) of the output voltage and a ratio of an actual value (Vext) of the supply voltage to a desired value (VSext) of the supply voltage. As a result, the output voltage (Vout) can be stabilized to the desired value (VSout) virtually independently of fluctuations of the supply voltage.

    5.
    发明专利
    未知

    公开(公告)号：DE10200621B4

    公开(公告)日：2005-03-24

    申请号：DE10200621

    申请日：2002-01-10

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SPITZ JAN ,  LUKAS RUPERT ,  ENGELHARDT CLAUS ,  KLIEWER JOERG

    IPC: G01R1/04 ,  H01R12/70 ,  H05K7/10 ,  H01R33/74 ,  H05K7/12

    Abstract: A frequent problem that arises in particular with regard to the analysis of memory components is that the memory components have to be tested under realistic conditions in a real application environment. In practice, such components are normally firmly soldered in on a module carrier. Owing to the thermal load during soldering, this solution cannot always be used and, furthermore, the contacts that are made should be detachable. Commercially available contact bases with detachable contacts cannot be used, however, since their dimensions are too large and they do not fit in the available surface area on the module carrier. The novel contact base is sufficiently small that a plurality of contact bases can be arranged closely one next to the other in a row in a very small space on a module carrier. The module carrier has plug contacts to be plugged into a commercial socket in order to make contact.

    6.
    发明专利
    未知

    公开(公告)号：DE10311373B4

    公开(公告)日：2005-02-24

    申请号：DE10311373

    申请日：2003-03-14

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SCHROEDER STEPHAN ,  KLIEWER JOERG ,  CAMPENHAUSEN AUREL VON ,  PROELL MANFRED

    IPC: G11C7/00 ,  G11C29/00 ,  G11C29/44

    Abstract: An integrated memory has individually addressable normal and redundant units of memory cells. A memory unit is used to store, in a normal mode, an address for one of the normal units which needs to be replaced by one of the redundant units. A comparison unit compares an address which is present on an address bus with an address stored in the memory unit and activates one of the redundant units in the event of a match being identified. The memory also has a test circuit which can be activated by a test mode signal, can reset the memory unit to an initial state, and can store an address for one of the redundant units in the memory unit for subsequently writing an identification code to this redundant unit.

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