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公开(公告)号：JP2005346691A
公开(公告)日：2005-12-15
申请号：JP2004320894
申请日：2004-11-04
Applicant: Intel Corp , インテル コーポレイション
Inventor： WILCOX JEFFREY R , KAUSHIK SHIVNANDAN , GUNTHER STEPHEN H , BODAS DEVADATTA V , RAMAKRISHNAN SIVA , LINT BERNARD J , HACKING LANCE E
Abstract: PROBLEM TO BE SOLVED: To provide a method for changing operation states of resources in a computing system, which are shared among a plurality of components of the computing system, in order to change the power consumption of the computing system.
SOLUTION: The method has a step of transmitting a packet including information about the change of the power consumption, through movement between one or more nodes within a packet base network in the computing system.
COPYRIGHT: (C)2006,JPO&NCIPIAbstract translation: 要解决的问题：提供一种用于改变在计算系统的多个组件之间共享的计算系统中的资源的操作状态的方法，以便改变计算系统的功耗。 解决方案：该方法具有通过计算系统中的分组基础网络内的一个或多个节点之间的移动来发送包括关于功耗变化的信息的分组的步骤。 版权所有（C）2006，JPO＆NCIPI
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公开(公告)号：JP2009080853A
公开(公告)日：2009-04-16
申请号：JP2009000311
申请日：2009-01-05
Applicant: Intel Corp , インテル コーポレイション
Inventor： WILCOX JEFFREY R , KAUSHIK SHIVNANDAN , GUNTHER STEPHEN H , BODAS DEVADATTA V , RAMAKRISHNAN SIVA , LINT BERNARD J , HACKING LANCE E
Abstract: PROBLEM TO BE SOLVED: To provide a method in order to change an operational state of a resource within a computing system that is shared by a plurality of components of the computing system so that the computing system's power consumption is altered. SOLUTION: One feature of the present invention relates to a method having a step of transmitting a plurality of packets to the respective transmitting destinations by transfer between two or more nodes via a packet base network which is not a shared media bus or ring in the computing system in order to alter power consumption of the computing system, and in order to alter operating states of a power source and/or a clock source in the computing system shared by a plurality of components of the computing system, each of the plurality of packets includes the same piece of information regarding alteration of the power consumption in order to notify the respective receivers of alteration of the operating states, the packet base network is provided between one or more processor and a memory controller which transfer mutually executable instructions via the packet base network. COPYRIGHT: (C)2009,JPO&INPIT
Abstract translation: 要解决的问题：提供一种方法，以便改变由计算系统的多个组件共享的计算系统内的资源的操作状态，使得计算系统的功耗被改变。 解决方案：本发明的一个特征涉及一种方法，该方法具有通过不是共享媒体总线或环的分组基网络在两个或多个节点之间传送来将多个分组发送到各个发送目的地的步骤 在计算系统中，为了改变计算系统的功耗，并且为了改变由计算系统的多个组件共享的计算系统中的电源和/或时钟源的操作状态， 多个分组包括关于功率消耗改变的相同信息，以通知各个接收机改变操作状态，分组基网络被提供在一个或多个处理器和存储器控制器之间，该控制器通过 分组基本网络。 版权所有（C）2009，JPO＆INPIT
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公开(公告)号：GB2423847B
公开(公告)日：2007-01-10
申请号：GB0609876
申请日：2004-11-16
Applicant: INTEL CORP
Inventor： WILCOX JEFFREY R , KAUSHIK SHIVNANDAN , GUNTHER STEPHEN H , BODAS DEVADATTA V , RAMAKRISHNAN SIVA , POISNER DAVID , LINT BERNARD J , HACKING LANCE E
Abstract: Systems and methods of managing power provide for receiving notification of a pending power state transition and using coordination hardware to determine whether the power state transition in a primary device is permitted by a set of secondary devices. In one embodiment, the primary device shares a resource with the set of secondary devices.
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公开(公告)号：GB2414826B
公开(公告)日：2007-01-10
申请号：GB0425264
申请日：2004-11-16
Applicant: INTEL CORP
Inventor： WILCOX JEFFREY R , KAUSHIK SHIVNANDAN , GUNTHER STEPHEN H , BODAS DEVADATTA V , RAMAKRISHNAN SIVA , POISNER DAVID , LINT BERNARD J , HACKING LANCE E
IPC: G06F1/26 , G06F1/32 , G06F12/08 , G06F15/173
Abstract: Systems and methods of managing power provide for receiving notification of a pending power state transition and using coordination hardware to determine whether the power state transition in a primary device is permitted by a set of secondary devices. In one embodiment, the primary device shares a resource with the set of secondary devices.
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公开(公告)号：HK1079315A1
公开(公告)日：2006-03-31
申请号：HK06101792
申请日：2006-02-10
Applicant: INTEL CORP
Inventor： WILCOX JEFFREY R , KAUSHIK SHIVNANDAN , GUNTHER STEPHEN H , BODAS DEVADATTA V , RAMAKRISHNAN SIVA , POISNER DAVID , LINT BERNARD J , HACKING LANCE E
IPC: G06F20060101 , G06F1/26 , G06F1/32 , G06F12/08
Abstract: Systems and methods of managing power provide for receiving notification of a pending power state transition and using coordination hardware to determine whether the power state transition in a primary device is permitted by a set of secondary devices. In one embodiment, the primary device shares a resource with the set of secondary devices.
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Patent Agency Ranking
公开(公告)号：GB2414826A
公开(公告)日：2005-12-07
申请号：GB0425264
申请日：2004-11-16
Applicant: INTEL CORP
Inventor： WILCOX JEFFREY R , KAUSHIK SHIVNANDAN , GUNTHER STEPHEN H , BODAS DEVADATTA V , RAMAKRISHNAN SIVA , POISNER DAVID , LINT BERNARD J , HACKING LANCE E
Abstract: A system of managing power provides for receiving notification of a pending power-state transition and using coordination hardware 18 to determine whether the power-state transition in a primary device 12 is permitted by a set of secondary devices 16. The primary device 12 shares a resource 14 with the secondary devices 16. The shared resource 14 may be a cache (26, 34, 42, Fig. 2A), a memory structure, a controller or an interface. The primary and secondary devices may be CPUs (24, 32, 40, Fig. 2A). The primary and secondary devices may be connected by a point-to-point network (23, Fig. 2B).
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公开(公告)号：GB2423847A
公开(公告)日：2006-09-06
申请号：GB0609876
申请日：2004-11-16
Applicant: INTEL CORP
Inventor： WILCOX JEFFREY R , KAUSHIK SHIVNANDAN , GUNTHER STEPHEN H , BODAS DEVADATTA V , RAMAKRISHNAN SIVA , POISNER DAVID , LINT BERNARD J , HACKING LANCE E
Abstract: A system for managing power provides for receiving notification of a pending power-state transition and using coordination hardware to determine whether the power-state transition in a primary device is permitted by a set of secondary devices. A primary processor 24 shares a cache 26 with secondary processors 30, 38. The primary and secondary processors are coupled by a point-to-point network 23. Coordination hardware 28 identifies the secondary processors 30, 38 as being dependent upon the power-state transition. Coordination hardware 28 queries the secondary processors 30, 38 to determine whether the power-state transition is permitted by sending a set of transition requests to the secondary processors and receiving a set of transition replies from the secondary processors.
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公开(公告)号：DE102005014727A1
公开(公告)日：2005-12-29
申请号：DE102005014727
申请日：2005-03-31
Applicant: INTEL CORP
Inventor： WILCOX JEFFREY R , KAUSHIK SHIVNANDAN , GUNTHER STEPHEN H , BODAS DEVADATTA V , RAMAKRISHNAN SIVA , POISNER DAVID , LINT BERNARD J , HACKING LANCE E
Abstract: Systems and methods of managing power provide for receiving notification of a pending power state transition and using coordination hardware to determine whether the power state transition in a primary device is permitted by a set of secondary devices. In one embodiment, the primary device shares a resource with the set of secondary devices.
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公开(公告)号：DE102004049680A1
公开(公告)日：2005-12-29
申请号：DE102004049680
申请日：2004-10-12
Applicant: INTEL CORP
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公开(公告)号：GB2481563A
公开(公告)日：2011-12-28
申请号：GB201118724
申请日：2009-12-22
Applicant: INTEL CORP
Inventor： MCKEEN FRANCIS X , ROZAS CARLOS V , SAVAGANKAR UDAY R , JOHNSON SIMON P , SCARLATA VINCENT R , GOLDSMITH MICHAEL A , BRICKELL ERNIE , LI JIANG TAO , HERBERT HOWARD C , DEWAN PRASHANT , TOLOPKA STEPHEN J , NEIGER GILBERT , DURHAM DAVID , GRAUNKE GARY , LINT BERNARD J , DYKE DON A VAN , CIHULA JOSEPH , JEYASINGH STALINSELVARAJ , DOREN STEPHEN R VAN , RODGERS DION , GARNEY JOHN I
Abstract: A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.
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