Abstract:
PROBLEM TO BE SOLVED: To provide power saving in a platform supporting a network interface. SOLUTION: A computer system 100 includes the platform 150 wherein a processing block 158 is supplied with power. The processing block 158 determines an optimal compression rate causing a minimum of total power to be consumed by the computer platform. The total power includes total compression power consumption and total transmission power consumption. The processing block 158 generates compressed frames from a plurality of frames generated by an application 110. The compressed frames is generated by encoding the plurality of frames by use of the optimal compression rate. The processing block 158 selects one network interface from a plurality of network interfaces 190 supported by the computer system 100 to transmit the compressed frames. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To determine a low-power operation period through inter-node negotiation on the basis of the data buffer amount.SOLUTION: The method includes: negotiating with a link partner about a latency time; determining system parameters in a first duration period on the basis of at least the residual amount of a transmission buffer; transmitting the system parameters of the first duration period to the link partner; receiving a second duration period from the link partner; and transmitting a start signal to the link partner on the basis at least partly of the second duration period, a buffered packet in the transmission buffer transmitted to the link partner, and delay transmission of a packet to the link partner, which are obtained through the negotiation.
Abstract:
PROBLEM TO BE SOLVED: To provide a method and system for balancing a load between a set of processing units in such a way to allow the servers to lower power consumption. SOLUTION: Continuous requests of the processing units and services are transferred to the processing units from a load balancing device. The continuous requests that are transferred to the processing units show batch with size equivalent to a batch size. Each batch after requested is transferred to the processing units after that and the processing units in which batch has not been processed become a low power state. This allows energy efficient operation of the set of processing units. Moreover, the process is adaptable to variations in systemic response times, so that systemic response times can be improved when dictated by operational conditions. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To control outgoing network activities and coordinate them with platform activity to fully benefit from longer term idleness, which may allow platform components to reach deeper sleep states, thus prolonging battery life. SOLUTION: The platform activities 102 synchronizes with applications 131 to create a long period of idleness of a platform. A communication device informs a host of expected idle durations, and holds received traffic by the communication device. Applications having non critical outgoing messages or engaging in periodic network activity register with an OS-application interface 142 for coordinating application task and platform activities. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
An embodiment may include network controller to be comprised in a first node. The node may be communicatively coupled to a network and may include a host processor to execute an operating system environment. The operating system environment may include, at least in part, a communication protocol stack and an application. The circuitry may receive, at least in part, a packet from the network. The packet may include, at least in part, a header and payload. At least one portion of the payload may be associated with the application. The circuitry may issue at least one portion of the header to the stack. The circuitry may issue the at least one portion of the payload to a destination device in a manner that by-passes involvement of the stack. The destination device may be specified, at least in part, by the application. Many alternatives, variations, and modifications are possible.
Abstract:
Technologien für einen verteilten Hardwarewarteschlangenmanager beinhalten eine Computervorrichtung, die einen Prozessor aufweist. Der Prozessor beinhaltet zwei oder mehr Hardwarewarteschlangenmanager sowie zwei oder mehr Prozessorkerne. Jeder Prozessorkern kann Daten von dem Hardwarewarteschlangenmanager in einer Warteschlange anordnen oder aus dieser entfernen. Jeder Hardwarewarteschlangenmanager kann derart konfiguriert sein, dass er mehrere Warteschlangendatenstrukturen enthält. In einigen Ausführungsformen werden die Warteschlangen von den Prozessorkernen unter Verwendung von virtuellen Warteschlangenadressen adressiert, welche in physikalische Warteschlangenadressen übersetzt werden, um auf den entsprechenden Hardwarewarteschlangenmanager zuzugreifen. Die virtuellen Warteschlangen können von einer physikalischen Warteschlange in einem Hardwarewarteschlangenmanager zu einer anderen physikalischen Warteschlange in einem anderen physikalischen Warteschlangenmanager bewegt werden, ohne die virtuelle Adresse der virtuellen Warteschlange zu ändern.
Abstract:
Ein Verfahren und System zum Durchführen von Datenbewegungsoperationen wird hierin beschrieben. Eine Ausführungsform eines Verfahrens weist auf: Speichern von Daten für eine erste Speicheradresse in einer Cachezeile eines Speichers einer ersten Verarbeitungseinheit, wobei die Cachezeile mit einem Kohärenzzustand assoziiert ist, der anzeigt, dass der Speicher den alleinigen Besitz der Cachezeile hat; Decodieren eines Befehls zur Ausführung durch eine zweite Verarbeitungseinheit, wobei der Befehl einen Quelldatenoperanden, der die erste Speicheradresse angibt, und einen Zieloperanden, der einen Speicherort in der zweiten Verarbeitungseinheit angibt, umfasst; und in Reaktion auf das Ausführen des decodierten Befehls Kopieren von Daten von der Cachezeile des Speichers der ersten Verarbeitungseinheit, wie durch die erste Speicheradresse identifiziert, zum Speicherort der zweiten Verarbeitungseinheit, wobei die Cachezeile in Reaktion auf den Kopiervorgang im Speicher verbleiben soll und der Kohärenzzustand unverändert bleiben soll.
Abstract:
A method of an aspect includes running a plurality of threads on a plurality of thread processors. Memory accesses, of a thread of the plurality that is running on a first thread processor of the plurality, are monitored to both a first memory through a first memory controller and a second memory through a second memory controller. A second thread processor of the plurality is selected for a thread based on the monitoring of the memory accesses of the thread to both the first memory and the second memory. Installation of the thread, for which the second thread processor was selected, is initiated on the second thread processor. Other methods, apparatus, and systems are also disclosed.
Abstract:
In an embodiment, an apparatus is provided that may include circuitry to generate, at least in part, and/or receive, at least in part, at least one request that at least one network node generate, at least in part, information. The information may be to permit selection, at least in part, of (1) at least one power consumption state of the at least one network node, and (2) at least one time period. The at least one time period may be to elapse, after receipt by at least one other network node of at least one packet, prior to requesting at least one change in the at least one power consumption state. The at least one packet may be to be transmitted to the at least one network node. Of course, many alternatives, modifications, and variations are possible without departing from this embodiment.