公开(公告)号：JPH11260938A

公开(公告)日：1999-09-24

申请号：JP1568499

申请日：1999-01-25

Applicant: LUCENT TECHNOLOGIES INC

Inventor： GREGOR RICHARD WILLIAM ,  KIZILYALLI ISIK C ,  ROY PRADIP K

IPC: H01L21/8247 ,  H01L21/28 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To produce a floating gate structure having a gate made of polysilicon and dielectric characteristics suitable particularly for a flash memory device, by changing dielectric material composing a gate structure and by setting the thickness of layer of a laminated structure in a predetermined range in manufacturing the floating gate structure. SOLUTION: A gate structure has a second dielectric layer 34 between a floating gate 32 made of polysilicon and a control gate 33 made of polysilicon. The second dielectric layer 34 has a laminated structure comprising a first SiO2 layer 35 having a thickness of 10 to 35 Å, a Ta2 O5 layer having a thickness of 30 to 100 Å, and a second SiO2 layer 37 having a thickness of 5 to 30 Å, and the thickness of second dielectric layer 34 is set in a range of 45 to 150 Å. This can produce a floating gate structure having a gate made of polysilicon and dielectric characteristics suitable for a flush memory device.

公开(公告)号：DE69936175D1

公开(公告)日：2007-07-12

申请号：DE69936175

申请日：1999-10-25

Applicant: LUCENT TECHNOLOGIES INC

Inventor： ARCHER VANCE DOLVAN ,  BELK NATHAN ,  CARROLL MICHAEL SCOTT ,  COCHRAN WILLIAM THOMAS ,  DENNIS DONALD C ,  FREI MICHEL RANJIT ,  GREGOR RICHARD WILLIAM ,  LIN WEN ,  MOINIAN SHAHRIAR ,  NAGY WILLIAM JOHN ,  NG KWOK K ,  PINTO MARK RICHARD ,  RICH DAVID ARTHUR ,  XIE YA-HONG ,  GOLDTHORP DAVID CLAYTON

IPC: H01L21/02 ,  H01L21/822 ,  H01L21/77 ,  H01L23/522 ,  H01L23/64 ,  H01L27/04 ,  H01L27/08

Abstract: The present invention provides for a method of manufacturing a simplified high Q inductor substrate and a semiconductor device having that substrate. The method for manufacturing the simplified high Q inductor substrate preferably comprises forming a base substrate over a semiconductor wafer, wherein the base substrate has a given dopant concentration and then forming an epitaxial (EPI) layer over the base substrate. The EPI layer includes epitaxially forming a first doped region in the EPI layer over the base substrate and then epitaxially forming a second doped region in the EPI layer over the first doped region. The first doped region has a dopant concentration greater than the given dopant concentration of the base substrate, and the second doped region has a dopant concentration less than the first doped region.

公开(公告)号：GB2355851B

公开(公告)日：2003-11-19

申请号：GB0015499

申请日：2000-06-23

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CHAUDHRY SAMIR ,  CHETLUR SUNDAR SRINIVASAN ,  GREGOR RICHARD WILLIAM ,  ROY PRADIP KUMAR ,  SIDHARTHASEN

IPC: C30B33/00 ,  H01L21/28 ,  H01L21/316 ,  H01L29/51 ,  H01L29/06

公开(公告)号：DE69936175T2

公开(公告)日：2008-01-24

申请号：DE69936175

申请日：1999-10-25

Applicant: LUCENT TECHNOLOGIES INC

Inventor： ARCHER VANCE DOLVAN ,  BELK NATHAN ,  CARROLL MICHAEL SCOTT ,  COCHRAN WILLIAM THOMAS ,  DENNIS DONALD C ,  FREI MICHEL RANJIT ,  GREGOR RICHARD WILLIAM ,  LIN WEN ,  MOINIAN SHAHRIAR ,  NAGY WILLIAM JOHN ,  NG KWOK K ,  PINTO MARK RICHARD ,  RICH DAVID ARTHUR ,  XIE YA-HONG ,  GOLDTHORP DAVID CLAYTON

IPC: H01L21/02 ,  H01L21/822 ,  H01L21/77 ,  H01L23/522 ,  H01L23/64 ,  H01L27/04 ,  H01L27/08

Abstract: The present invention provides for a method of manufacturing a simplified high Q inductor substrate and a semiconductor device having that substrate. The method for manufacturing the simplified high Q inductor substrate preferably comprises forming a base substrate over a semiconductor wafer, wherein the base substrate has a given dopant concentration and then forming an epitaxial (EPI) layer over the base substrate. The EPI layer includes epitaxially forming a first doped region in the EPI layer over the base substrate and then epitaxially forming a second doped region in the EPI layer over the first doped region. The first doped region has a dopant concentration greater than the given dopant concentration of the base substrate, and the second doped region has a dopant concentration less than the first doped region.

公开(公告)号：GB2355851A

公开(公告)日：2001-05-02

申请号：GB0015499

申请日：2000-06-23

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CHAUDHRY SAMIR ,  CHETLUR SUNDAR SRINIVASAN ,  GREGOR RICHARD WILLIAM ,  ROY PRADIP KUMAR ,  SIDHARTHASEN

IPC: C30B33/00 ,  H01L21/28 ,  H01L21/316 ,  H01L29/51 ,  H01L29/06

Abstract: The device 10 has a gate length of 0.05-1.25 microns where the short channel effect is prevented by halo or pocket implantation regions 13 formed in the channel rather than by lightly doped drain or source regions. The thin gate oxide 16 comprises upper and lower portions 17 and 18, and is substantially stress free and planar with respect to the substrate 12.