公开(公告)号：US6433285B2

公开(公告)日：2002-08-13

申请号：US73579200

申请日：2000-12-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： MAEDA KENJI ,  TAKATA TAKASHI ,  NARAOKA HIROKI ,  HOMMA HAJIME ,  NONOYAMA SHIGERU ,  ARAI YOSHIYUKI ,  YAMADA YUICHIRO ,  ITO FUMITO

IPC: G06K19/077 ,  H01L21/56 ,  H01L23/498 ,  H05K3/28 ,  H05K1/16

CPC classification number: G06K19/072 ,  G06K19/07743 ,  G06K19/07745 ,  H01L21/565 ,  H01L23/49855 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/284 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention provides a printed wiring board, an IC card module including the printed wiring board, and a method for fabricating the IC card module, for improving reliability of IC cards. The printed wiring board and the IC card module of the invention include: a base having a resin sealing region, clamped regions in a periphery zone of the resin sealing region clamped with a sealing mold, and non-clamped regions in the periphery zone; and terminals for external connection formed on the top surface of the base. The terminals are formed in a region other than any of the resin sealing region, the clamped regions, and the non-claimed regions.

Abstract translation: 本发明提供一种印刷电路板，包括印刷电路板的IC卡模块以及用于提高IC卡的可靠性的IC卡模块的制造方法。 本发明的印刷线路板和IC卡模块包括：具有树脂密封区域的基座，用密封模具夹持的树脂密封区域的周边区域中的夹持区域和周边区域中的非夹紧区域; 以及形成在基座顶表面上的用于外部连接的端子。 端子形成在除了树脂密封区域，夹紧区域和非索赔区域中的任何一个以外的区域中。

公开(公告)号：DE68916855T2

公开(公告)日：1995-01-19

申请号：DE68916855

申请日：1989-05-12

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KOJIMA MAKOTO ,  TAKATA TAKASHI

IPC: H01L21/8247 ,  G11C16/04 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  G11C17/12 ,  H01L21/339 ,  H01L27/115 ,  H01L29/762 ,  H01L29/788 ,  H01L29/792 ,  G11C16/06

Abstract: This invention relates to a semiconductor non-volatile memory device, in which plural data storage parts are connected in series between the source region and drain region. In such constitution, when integrating the semiconductors, the relative area occupied by the selection gate, separation gate, source region and drain region of the area of the data storage parts may be drastically reduced, and the degree of integration of semiconductor non-volatile memory device can be dramatically enhanced. This invention also comprises means for setting the semiconductor substrate in depletion state by sequentially varying the gate potential of the plural data storage parts and transferring the electric charges sequentially. By this means for transferring electric charges, data write errors may be securely prevented.

公开(公告)号：DE68916855D1

公开(公告)日：1994-08-25

申请号：DE68916855

申请日：1989-05-12

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： KOJIMA MAKOTO ,  TAKATA TAKASHI

IPC: H01L21/8247 ,  G11C16/04 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  G11C17/12 ,  H01L21/339 ,  H01L27/115 ,  H01L29/762 ,  H01L29/788 ,  H01L29/792 ,  G11C16/06

Abstract: This invention relates to a semiconductor non-volatile memory device, in which plural data storage parts are connected in series between the source region and drain region. In such constitution, when integrating the semiconductors, the relative area occupied by the selection gate, separation gate, source region and drain region of the area of the data storage parts may be drastically reduced, and the degree of integration of semiconductor non-volatile memory device can be dramatically enhanced. This invention also comprises means for setting the semiconductor substrate in depletion state by sequentially varying the gate potential of the plural data storage parts and transferring the electric charges sequentially. By this means for transferring electric charges, data write errors may be securely prevented.