公开(公告)号：US6433285B2

公开(公告)日：2002-08-13

申请号：US73579200

申请日：2000-12-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： MAEDA KENJI ,  TAKATA TAKASHI ,  NARAOKA HIROKI ,  HOMMA HAJIME ,  NONOYAMA SHIGERU ,  ARAI YOSHIYUKI ,  YAMADA YUICHIRO ,  ITO FUMITO

IPC: G06K19/077 ,  H01L21/56 ,  H01L23/498 ,  H05K3/28 ,  H05K1/16

CPC classification number: G06K19/072 ,  G06K19/07743 ,  G06K19/07745 ,  H01L21/565 ,  H01L23/49855 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/284 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention provides a printed wiring board, an IC card module including the printed wiring board, and a method for fabricating the IC card module, for improving reliability of IC cards. The printed wiring board and the IC card module of the invention include: a base having a resin sealing region, clamped regions in a periphery zone of the resin sealing region clamped with a sealing mold, and non-clamped regions in the periphery zone; and terminals for external connection formed on the top surface of the base. The terminals are formed in a region other than any of the resin sealing region, the clamped regions, and the non-claimed regions.

Abstract translation: 本发明提供一种印刷电路板，包括印刷电路板的IC卡模块以及用于提高IC卡的可靠性的IC卡模块的制造方法。 本发明的印刷线路板和IC卡模块包括：具有树脂密封区域的基座，用密封模具夹持的树脂密封区域的周边区域中的夹持区域和周边区域中的非夹紧区域; 以及形成在基座顶表面上的用于外部连接的端子。 端子形成在除了树脂密封区域，夹紧区域和非索赔区域中的任何一个以外的区域中。

公开(公告)号：JP2000150756A

公开(公告)日：2000-05-30

申请号：JP32310098

申请日：1998-11-13

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ITO FUMITO ,  NANO MASANORI ,  KOGA AKIRA

IPC: H01L23/50 ,  H01L23/12 ,  H01L23/28

Abstract: PROBLEM TO BE SOLVED: To make a resin-sealed semiconductor device thinner and smaller as well as improve the heat dissipation property of the resin-sealed semiconductor device. SOLUTION: The end portion of an inner lead 1 has a step portion 1a where its lower surface is higher than the other portion and a heat conductive plate 2 is held under the lower surface of the step portion 1a via an insulating resin 3. A semiconductor chip 5 is held on the upper surface of the heat conductive plate 2 via the insulating resin 3 and a silver paste 4. The inner lead 1 and an electrode for signal of the semiconductor chip 5 are electrically connected by a bonding wire 6 made of gold wire. The inner lead 1, the heat conductive plate 2, the semiconductor chip 5, etc., are sealed by a resin package 7 so that the lower surface of the portion other than end portion of the inner lead 1 and the lower surface of the heat conductive plate 2 are exposed.

公开(公告)号：JP2000294717A

公开(公告)日：2000-10-20

申请号：JP9518599

申请日：1999-04-01

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NANO MASANORI ,  TAKEMURA KUNIKAZU ,  YAMADA YUICHIRO ,  ITO FUMITO ,  MATSUO TAKAHIRO

IPC: H01L23/50 ,  H01L23/12

Abstract: PROBLEM TO BE SOLVED: To realize a resin-sealed semiconductor device of a type in which a lower surface of a die pad is exposed from sealing resin and one faces of leads are sealed and which can suppress progressing peel-off between a surface of the die pad and sealing resin, and also to realize a method for manufacturing the semiconductor device. SOLUTION: In the resin-sealed semiconductor device, an annular groove 64 surrounding a central part 2a (support part) upset from a peripheral part 2b by a semi-cut part 11 of a die pad 2 is made in an upper surface of the central part 2a. And a gap between an upper surface of the peripheral part 2b and a rear surface of a semiconductor chip 4 is filled with sealing resin 6. Even when deterioration of a moisture resistance or generation of a thermal stress causes peel-off between the gap filled part 6a and die pad 2, and the peel-off is progressed, the peel-off itself is trapped by the groove 64. Therefore, the progress of the resin peel-off can be stopped and the semiconductor device can be maintained high in its reliability.

公开(公告)号：JPH10189830A

公开(公告)日：1998-07-21

申请号：JP2233797

申请日：1997-02-05

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： OKUMURA ICHIRO ,  NANO MASANORI ,  KOUTOU NORIO ,  MORIKAWA TAKESHI ,  FUKUDA TOSHIYUKI ,  ITO FUMITO

IPC: H01L23/28 ,  H01L23/12 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To provide a resin-sealed semiconductor device and its manufacturing method having high reliability, while realizing the thinning process not only the conventional type one with its both sides simply resin-sealed. SOLUTION: Another sealing resin 15a is provided beneath a die pad 11 due to stepped parts 17 formed by upsetting process of hanging leads 10 of a lead frame 9, so that a thin-type but substantially both side sealing-type semiconductor device may be provided with both side sealing structure for securing the reliability thereof. Furthermore, outer lead parts 16 to be outer terminals are substantially on the same surface of the sides of the sealing resins 15 not to be protruded from the conventional sealing resins, thereby enabling the deformation, etc., of the outer leads 16 to be avoided for realizing the surface packaged type semiconductor device.

公开(公告)号：JPH1174440A

公开(公告)日：1999-03-16

申请号：JP7371198

申请日：1998-03-23

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NANO MASANORI ,  KONISHI SATOSHI ,  MORISHITA YOSHIHIKO ,  YAMADA YUICHIRO ,  ITO FUMITO

IPC: H01L23/28 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To realize high reliability and a thin configuration, by maintaining adhesion between a lead frame and sealing, and making it possible to provide stable connection between a metal fine line and an inner lead part. SOLUTION: When a device is constituted by providing a semiconductor element 12 which is mounted on a support part 11 of a lead frame, a metal fine line 14 which connects the electrode of this semiconductor element 12 and an inner lead part 13 of the lead frame, and sealing resin 15, the above described lead frame is upset and processed so that the support part 11 is located at the upper side from the inner lead part 13. Therefore, the sealing resin 15 having the thickness by the amount of the step difference of the upset is present at the lower side of the supporting part 11, and the adhesion between the above described lead frame and one sealing resin 15 can be improved. Furthermore, since at least one groove part is provided in the surface of the inner lead part 13, the anchor effect with the sealing resin 15, stress applied on a product lead part, and stress to the metal fine line 14 can be alleviated. Lead peeling and the peeling of the metal fine line can be prevented.

公开(公告)号：JP2000243891A

公开(公告)日：2000-09-08

申请号：JP4604099

申请日：1999-02-24

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NANO MASANORI ,  TAKEMURA KUNIKAZU ,  YAMADA YUICHIRO ,  ITO FUMITO ,  MATSUO TAKAHIRO

IPC: H01L23/50 ,  H01L23/12

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which has a QFN(quad flat pack non-leaded package) structure with an external terminal protruding downward while functions as a power QFN with freedom in a selecting a chip size, with a good heat-radiation characteristics maintained. SOLUTION: A power QFN comprising a signal lead 1, die pad 2, suspension lead 3, and DB past 7 for die-bond, which are shield in a sealing resin 6. The lower part of the signal lead 1 protrudes below the sealing resin 6 to function as an external electrode 9. The suspension lead 3 is provided with bend parts 13 and 14 at two points, with the suspension lead 3 provided with a deformation absorption function. The die-pad 2 is provided with a semi-cut part 11 to upset a central part 2a than a peripheral part 2b, causing no interference with the suspension lead 3 so that the size of a semiconductor chip 4 is freely selected while moisture-resistance is improved.