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    RESIN-SEALED SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
    3.
    发明专利
    RESIN-SEALED SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效

    公开(公告)号：JP2000294717A

    公开(公告)日：2000-10-20

    申请号：JP9518599

    申请日：1999-04-01

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： NANO MASANORI ,  TAKEMURA KUNIKAZU ,  YAMADA YUICHIRO ,  ITO FUMITO ,  MATSUO TAKAHIRO

    IPC: H01L23/50 ,  H01L23/12

    Abstract: PROBLEM TO BE SOLVED: To realize a resin-sealed semiconductor device of a type in which a lower surface of a die pad is exposed from sealing resin and one faces of leads are sealed and which can suppress progressing peel-off between a surface of the die pad and sealing resin, and also to realize a method for manufacturing the semiconductor device. SOLUTION: In the resin-sealed semiconductor device, an annular groove 64 surrounding a central part 2a (support part) upset from a peripheral part 2b by a semi-cut part 11 of a die pad 2 is made in an upper surface of the central part 2a. And a gap between an upper surface of the peripheral part 2b and a rear surface of a semiconductor chip 4 is filled with sealing resin 6. Even when deterioration of a moisture resistance or generation of a thermal stress causes peel-off between the gap filled part 6a and die pad 2, and the peel-off is progressed, the peel-off itself is trapped by the groove 64. Therefore, the progress of the resin peel-off can be stopped and the semiconductor device can be maintained high in its reliability.

    RESIN-SEALED SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
    4.
    发明专利
    RESIN-SEALED SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效

    公开(公告)号：JPH1174440A

    公开(公告)日：1999-03-16

    申请号：JP7371198

    申请日：1998-03-23

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： NANO MASANORI ,  KONISHI SATOSHI ,  MORISHITA YOSHIHIKO ,  YAMADA YUICHIRO ,  ITO FUMITO

    IPC: H01L23/28 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50

    Abstract: PROBLEM TO BE SOLVED: To realize high reliability and a thin configuration, by maintaining adhesion between a lead frame and sealing, and making it possible to provide stable connection between a metal fine line and an inner lead part. SOLUTION: When a device is constituted by providing a semiconductor element 12 which is mounted on a support part 11 of a lead frame, a metal fine line 14 which connects the electrode of this semiconductor element 12 and an inner lead part 13 of the lead frame, and sealing resin 15, the above described lead frame is upset and processed so that the support part 11 is located at the upper side from the inner lead part 13. Therefore, the sealing resin 15 having the thickness by the amount of the step difference of the upset is present at the lower side of the supporting part 11, and the adhesion between the above described lead frame and one sealing resin 15 can be improved. Furthermore, since at least one groove part is provided in the surface of the inner lead part 13, the anchor effect with the sealing resin 15, stress applied on a product lead part, and stress to the metal fine line 14 can be alleviated. Lead peeling and the peeling of the metal fine line can be prevented.

    LEAD FRAME, SEMICONDUCTOR DEVICE USING AND ITS PRODUCTION
    5.
    发明专利
    LEAD FRAME, SEMICONDUCTOR DEVICE USING AND ITS PRODUCTION 失效

    公开(公告)号：JPH10326858A

    公开(公告)日：1998-12-08

    申请号：JP18014298

    申请日：1998-06-26

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： KONISHI SATOSHI ,  YAMADA YUICHIRO

    IPC: H01L21/56 ,  H01L23/50

    Abstract: PROBLEM TO BE SOLVED: To provide a lead frame, a semiconductor device using it and its production method by which the adhesion to packaging resin can be kept, even when the rear surface of a semiconductor element is exposed, and the formation of nonfilled region be eliminated during resin packaging. SOLUTION: A small die pad 36 is constituted of joint parts 37a, 37b and 37c, and a lead frame having the die pad 36 smaller than a semiconductor element to be mounted is used, so that the adhesion to packaging resin can be kept, a stress generating therebetween is released, and the occurrence of package cracks be prevented in a reflow step. In addition, no joint part is provided in a gate diagonal region 39 opposite to a resin gate port 38, so that a resin injected from the resin gate port 38 during resin packaging is applied at a constant velocity, since the gate diagonal area 39 is injected with a resin, together with the right and left area of the die pad 36, thereby the formation of nonfilled voids are prevented.

    LEAD FRAME, SEMICONDUCTOR DEVICE USING THE SAME AND ITS PRODUCTION
    6.
    发明专利
    LEAD FRAME, SEMICONDUCTOR DEVICE USING THE SAME AND ITS PRODUCTION 失效

    公开(公告)号：JPH10326857A

    公开(公告)日：1998-12-08

    申请号：JP18014198

    申请日：1998-06-26

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： KONISHI SATOSHI ,  YAMADA YUICHIRO

    IPC: H01L21/56 ,  H01L23/50

    Abstract: PROBLEM TO BE SOLVED: To provide a lead frame, a semiconductor device using it and its production method by which the adhesion to packaging resin can be kept, even when the rear surface of a semiconductor element is exposed, and the formation of nonfilled area be eliminated during resin packaging. SOLUTION: A small die pad 41 is constituted of recessed joint parts 42a, 42b, 42c, and 42d and a lead frame having the die pad 41 smaller than a semiconductor element to be mounted is used, so that the adhesion top packaging resin can be kept, a stress generating therebetween being released, and the occurrence of package cracks be prevented in a reflow step. When the die pad 41 is subject to resin packaging, since a resin injected from a resin gate port 43 becomes lower in resistance to resin flow on the rear surface of the die pad 41 because of the die pad 41 having a recessed part, the velocity of resin flow on the rear surface is made constant, thereby preventing the formation of nonfilled voids.

    RESIN-SEALED SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
    7.
    发明专利
    RESIN-SEALED SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效

    公开(公告)号：JPH1012773A

    公开(公告)日：1998-01-16

    申请号：JP16265696

    申请日：1996-06-24

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： NANO MASANORI ,  YOSHIDA HIROYOSHI ,  KOGA AKIRA ,  SAKAGUCHI SHIGEKI ,  YAMADA YUICHIRO

    IPC: H01L23/28 ,  H01L21/56 ,  H01L23/12 ,  H01L23/29 ,  H01L23/31 ,  H01L23/50 ,  H05K3/34

    Abstract: PROBLEM TO BE SOLVED: To obtain a resin-sealed semiconductor device having no die pad portion without requiring the formation of an outer lead portion. SOLUTION: This device is constituted with an electrode of a semiconductor element 8, an external terminal portion 10 electrically connected with a metal wire 9, a semiconductor element 8, a metal wire 9, and an outer boundary region of the external terminal portion 10, an a sealing resin 11 sealing one surface only; and a die pad portion for mounting the semiconductor element 8 is eliminated, so that the occurrence of stress due to the thermal expansion of the die pad portion is omitted, and thus the occurrence of package cracks can be prevented. Also, the external terminal portion 10 has a flat shape, and thus it has an excellent terminal shape as a semiconductor device of a surface mounting type and the semiconductor element 8 is exposed to the outside on its rear surface and therefore its heat radiating ability can be improved.

    MANUFACTURE OF SEMICONDUCTOR PACKAGE
    8.
    发明专利
    MANUFACTURE OF SEMICONDUCTOR PACKAGE 失效

    公开(公告)号：JP2000183263A

    公开(公告)日：2000-06-30

    申请号：JP36051398

    申请日：1998-12-18

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： YAMADA YASUHIRO ,  NANO MASANORI ,  OIDA SHIGEJI ,  MATSUO TAKAHIRO ,  YAMADA YUICHIRO

    IPC: H01L21/56 ,  H01L23/50

    Abstract: PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor package having improved reliability in substrate mounting and generating no metal burrs on the tip part of a lead part, even after cutting of a lead. SOLUTION: Chip cutting of a lead part 28 is performed, using a dicer 30 for the purpose of separating the lead part 28 and the lead frame 29 a semiconductor package 27, which is formed in the state wherein sheet 2 is adhered to the lead frame 29, and the lead is cut in the state wherein its tip parts are brought parallel with each other. Accordingly, since the package is cut by a dicer in a state wherein the sheet 21 is adhered, metal burrs are not generated on the lead tip, no touble is produced in the formation of a solder fillet when a substrate is mounted, and the reliability of substrate mounting can be improved.

    RESIN SEALING TYPE SEMICONDUCTOR DEVICE, ITS MANUFACTURE METHOD, AND LEAD FRAME
    9.
    发明专利
    RESIN SEALING TYPE SEMICONDUCTOR DEVICE, ITS MANUFACTURE METHOD, AND LEAD FRAME 失效

    公开(公告)号：JP2000243891A

    公开(公告)日：2000-09-08

    申请号：JP4604099

    申请日：1999-02-24

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： NANO MASANORI ,  TAKEMURA KUNIKAZU ,  YAMADA YUICHIRO ,  ITO FUMITO ,  MATSUO TAKAHIRO

    IPC: H01L23/50 ,  H01L23/12

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which has a QFN(quad flat pack non-leaded package) structure with an external terminal protruding downward while functions as a power QFN with freedom in a selecting a chip size, with a good heat-radiation characteristics maintained. SOLUTION: A power QFN comprising a signal lead 1, die pad 2, suspension lead 3, and DB past 7 for die-bond, which are shield in a sealing resin 6. The lower part of the signal lead 1 protrudes below the sealing resin 6 to function as an external electrode 9. The suspension lead 3 is provided with bend parts 13 and 14 at two points, with the suspension lead 3 provided with a deformation absorption function. The die-pad 2 is provided with a semi-cut part 11 to upset a central part 2a than a peripheral part 2b, causing no interference with the suspension lead 3 so that the size of a semiconductor chip 4 is freely selected while moisture-resistance is improved.

    SEMICONDUCTOR DEVICE
    10.
    发明专利
    SEMICONDUCTOR DEVICE 失效

    公开(公告)号：JPH10270601A

    公开(公告)日：1998-10-09

    申请号：JP7134697

    申请日：1997-03-25

    Applicant: MATSUSHITA ELECTRONICS CORP

    Inventor： YAMADA YUICHIRO ,  KAMETAKA MAKOTO

    IPC: H01L21/60 ,  H01L23/12 ,  H01L23/28

    Abstract: PROBLEM TO BE SOLVED: To provide a small and thin semiconductor device which can be assembled by applying an existing technology while preventing the outer terminal from being deformed. SOLUTION: A carrier 2 formed with bumps 5 is bonded through an adhesive 3 onto the upper surface of a chip 1. End face of the bump 5 not connected directly with a wiring pattern on the upper surface of the carrier 2 is exposed in order to provide an outer electrode. A pad on the upper surface of the chip 1 is connected electrically with a pad on the upper surface of the carrier 2 through a low looped wire 4. The upper surface part and other parts of the chip 1 has such structure as being covered with sealing resin 6. According to the structure, mounting area can be reduced to the chip size thus realizing reduction in size. Furthermore, a thin device can be realized because electrical connection is made using a short and low looped wire arrange within the chip.

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