公开(公告)号：US3929531A

公开(公告)日：1975-12-30

申请号：US36008073

申请日：1973-05-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： HATTORI HIROTSUGU ,  TAKAYAMA YUICHIRO

IPC: H01L21/306 ,  H01L25/07 ,  H01L29/00 ,  H01L21/304

CPC classification number: H01L25/074 ,  H01L21/30604 ,  H01L29/00 ,  H01L2924/0002 ,  Y10S148/054 ,  H01L2924/00

Abstract: A method of manufacturing rectifying device by cutting a lamination of semiconductor wafers each having a P-N junction formed therein along planes perpendicular to the plane of the wafer and subjecting the resultant divided series diode laminations to an etching treatment with a blend etching liquid composed of hydrogen fluoride, nitric acid and acetic acid. The etching liquid strongly acts upon the N-type region, while it weakly acts upon the P-type region, so that a configuration similar to that which would be obtained through a positive bevel treatment may be obtained. Thus, it is possible to obtain a high breakdown voltage rectifier which is hardly subject to destruction due to a transient reverse voltage.

Abstract translation: 一种通过切割每个具有PN结的半导体晶片的层压制造整流装置的方法，所述半导体晶片具有垂直于晶片平面的平面，并且使所得到的分割的二极管叠层用由氟化氢组成的混合蚀刻液进行蚀刻处理 ，硝酸和乙酸。 蚀刻液体强烈地作用在N型区域上，而弱作用在P型区域上，因此可以获得与通过正斜面处理获得的结构相似的构造。 因此，可以获得由于瞬态反向电压几乎不被破坏的高击穿电压整流器。

公开(公告)号：CA980916A

公开(公告)日：1975-12-30

申请号：CA171820

申请日：1973-05-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： HATTORI HIROTSUGU ,  TAKAYAMA YUICHIRO

IPC: H01L21/306 ,  H01L25/07 ,  H01L29/00

公开(公告)号：DE2325351A1

公开(公告)日：1973-11-29

申请号：DE2325351

申请日：1973-05-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： HATTORI HIROTSUGU ,  TAKAYAMA YUICHIRO

IPC: H01L21/306 ,  H01L25/07 ,  H01L29/00 ,  H01L7/50

公开(公告)号：JPH0320020A

公开(公告)日：1991-01-29

申请号：JP15541489

申请日：1989-06-16

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKAYAMA YUICHIRO

IPC: H01L21/22

Abstract: PURPOSE:To make the thickness and quality of a film uniform by giving arbitral fluctuations with time in the flow direction of reaction gas in a semiconductor wafer treating device. CONSTITUTION:A hollow shaft 2 at which one end is closed and the other end is connected to a discharging gas device is supported by each bearing 4. One or more holes 3 are provided at the shaft 2 in order to suck dust produced by friction between the shaft 2 and the bearing 4 into a hollow part; besides, a means 5 to make the flow direction of reaction gas change is prepared at the shaft 2. The use of movement of the shaft 2 makes the flow direction of gas which comes into contact with the surface of a wafer during its heat treatment change with time. This makes the thickness and quality of a film at the surface of each wafer uniform.

公开(公告)号：JPH01258465A

公开(公告)日：1989-10-16

申请号：JP8689888

申请日：1988-04-08

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： MIURA TAKASHI ,  TAKAYAMA YUICHIRO

IPC: H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L27/10

Abstract: PURPOSE:To protect wires from disconnection and to prevent soft errors attributable to alpha-rays by a method wherein a memory region is divided into a plurality of small memory cell blocks and only the regions occupied by the blocks is covered by a resin capable of absorbing alpha-rays. CONSTITUTION:The memory region of a semiconductor chip 1 is divided into a plurality of memory cell blocks 2. Only the regions occupied by the memory cell blocks 2 are covered by a resin 3 capable of absorbing alpha-rays, but the area between the memory cell blocks 2 is not covered by the resin 3 capable of absorbing alpha-rays and is formed into inter-block streets 4. In a device designed as such, alpha-rays are absorbed by the resin 3 capable of absorbing alpha-rays, which prevents soft errors from being produced in the memory cell blocks 2. Further, stress is alleviated, which protects chips from cracks and aluminum wires from disconnection.

公开(公告)号：JPH03157922A

公开(公告)日：1991-07-05

申请号：JP29786589

申请日：1989-11-16

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKAYAMA YUICHIRO

IPC: H01L21/205 ,  H01L21/22

Abstract: PURPOSE:To reduce an irregularity in the thickness of a film by heat treating a semiconductor wafer while reciprocating a cantilever without contact with a quartz tube during a period in which the wafer is inserted into the tube of a heat treating furnace. CONSTITUTION:All information of a semiconductor heat treating apparatus is sent to a computer 8 for controlling a cantilever driver 6, and in addition information for reciprocating the cantilever 1 is sent at specified amplitude and speed. Thus, periodic change is generated in the speed of reaction gas in the periphery of a wafer 2, and variations in the quality, thickness of wafers among the wafers can be reduced.

公开(公告)号：JPH04191739A

公开(公告)日：1992-07-10

申请号：JP32464990

申请日：1990-11-26

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： WATANABE HISASHI ,  TAKAYAMA YUICHIRO ,  TODOKORO YOSHIHIRO ,  INOUE MORIO

IPC: G03F1/30 ,  G03F1/68 ,  H01L21/027

Abstract: PURPOSE:To enhance reliability of generated data by judging whether mask data are wiring data or window data, judging whether the number of near-by parallel wirings is an even number or an odd number when the mask data are wiring data, and generating required data respectively. CONSTITUTION:Mask data 1 corresponding to a desired figure, and resolving limit data 2 of a stepper are stored in a storage device, and a preparing means 3 prepares striped pattern data to store them in the storage device. Then, a extracting means 4 reads out data 1 of one layer, a judging means 5 judges whether the data 1 are wiring data or not, a converting means 6 judges whether the number (m) of near-by parallel wirings is an even number or an odd number when the above data are wiring data, and prepares 1/2m pieces of transparent type phase shift mask wiring data when the number of near-by parallel wirings is an even number. When the number of near-by parallel wirings is an odd number, 1/2(m - 1) pieces of the above data are prepared, and one piece of wiring data is added. On the other hand, when the means 5 judges that the mask data are window data, a converting means 7 performs OR graphic logical operation on the striped pattern data and the window data, and generates transparent type phase shift mask window data.

公开(公告)号：JPH03284836A

公开(公告)日：1991-12-16

申请号：JP8658190

申请日：1990-03-30

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKAYAMA YUICHIRO

IPC: H01L21/205 ,  H01L21/31

Abstract: PURPOSE:To control the flow of reactive gas arbitrarily and obtain uniform film quality in one semiconductor substrate and different semiconductor substrates by a method wherein two or more gas supply tubes, two or more gas suction tubes and a control means which controls the individual flow rates of those pipes independently are provided. CONSTITUTION:If flow rate control is performed for one period in such a manner that gas supply tubes 10 and 12 supply reactive gas, gas suction tubes 6 and 8 suck gas in a reaction chamber, gas supply tubes 7 and 9 do not supply gas and gas suction tubes 11 and 13 do not suck gas, gas in the reaction chamber shows a clockwise rotary movement in that period. After that, if flow rate control is performed in such a manner that the flow rates of the gas suction tubes 6 and 8 and the gas supply tubes 10 and 12 are zero and then, for the next period, the gas supply tubes 7 and 9 supply reactive gas, the gas suction tubes 11 and 13 suck gas in the reaction chamber, the gas supply tubes 10 and 12 do not supply gas and the gas suction tubes 6 and 8 do not suck gas, gas in the reaction chamber shows a counter-clockwise rotary movement.

公开(公告)号：JPH01200912A

公开(公告)日：1989-08-14

申请号：JP2400088

申请日：1988-02-05

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKAYAMA YUICHIRO

IPC: B28D5/00 ,  H01L21/301 ,  H01L21/304

Abstract: PURPOSE:To generate a regular crevice without generating a flaw in the crevice, by inserting a hydrophilic fibrous substance in the cut groove processed to the surface of a semiconductor substrate and cooling the water infiltrated in said fibrous substance to form the crevice. CONSTITUTION:A plurality of cut grooves 2 having a desired depth are formed to the desired surface of a semiconductor substrate 1 at desired positions by a diamond saw and a hydrophilic fibrous substance is inserted in each of said grooves 2. Then, water 8 is infiltrated in said fibrous substance 3 at 0 deg.C or more to be held thereto and each groove 2 is cooled to 0 deg.C or less on the side of the opening part thereof so that the freezing of the water in the groove advances from the opening part thereof to the deep part thereof. Whereupon, the water 8 in each cut groove 2 is successively frozen from the opening part of said groove 2 and, since ice expands, the force opening the surface walls of the cut groove 2 outwardly is generated to make it possible to divide the semiconductor substrate 1 at the bottom part of each cut groove 2. Therefore, regular crevices can be generated and the mutual collision of cleaved surfaces is eliminated and the generation of a flaw in each crevice can be prevented.

公开(公告)号：JPH0437046A

公开(公告)日：1992-02-07

申请号：JP14319890

申请日：1990-05-31

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKAYAMA YUICHIRO ,  TODOKORO YOSHIHIRO ,  INOUE MORIO

IPC: G01N21/88 ,  G01N21/956 ,  H01L21/66

Abstract: PURPOSE:To realize periodic arrangement on the whole surface of a semiconductor substrate, by a method wherein the sum of the dimension of a peripheral circuit part containing bonding pads and that of a scribe trench are made equal to integer times a rectangular unit figure. CONSTITUTION:In a region 2, only the rectangular unit regions 1 are arranged in regular order on a chip. The distance in x-direction and the distance in y-direction between the region 2 and a region 3 or a region 4 which are adjacent to the region 2 are set so as to satisfy equations, where xe is the width of a left peripheral circuit in x-direction, xr is the width of a right peripheral circuit region in x-direction, yu is the width of an upper peripheral circuit region in y-direction, yd is the width of a lower peripheral circuit region in y-direction, sx is the width of a scribe trench region in x-direction, sy is the width of a scribe trench region in x-direction, sy is the width of a scribe trench region in y-direction, ux is the width of the unit figure in x-direction, and uy is the width of unit figure in y-derection. In order to satisfy the above relations for the dimensions of the scibe trench 5 and the peripheral circuit part 6, the width sx of the scribe trench in x-direction may be increased or decreased in the distance range of 0-+ or -ux, in response to necessity as far as the x-direction is concerned. As to the y-direction also, the similar process can be applied.