Microprocesador o microcontrolador potenciado

    公开(公告)号:ES2396800T3

    公开(公告)日:2013-02-27

    申请号:ES08857235

    申请日:2008-11-26

    Abstract: Un dispositivo de microprocesador de n bits que comprende: una unidad central de procesamiento de n bits (CPU); una pluralidad de registros (185) de funciones especiales y de registros de proposito general con los que seestablece una correlacion en memoria con una pluralidad de bancos, en el que los registros (185) de funcionesespeciales comprenden por lo menos dos registros (150; 960) de direccion de memoria indirecta de 16 bits a losque puede acceder dicha CPU a traves de todos los bancos; una unidad de acceso a banco para acoplar dicha CPU con uno de dicha pluralidad de bancos; una memoria (160) de datos acoplada con la CPU; y una memoria (120) de programa acoplada con la CPU, en el que dichos registros (150; 960) de direccion de memoria indirecta pueden accionarse para acceder a dichamemoria (160) de datos o memoria (120) de programa y en el que un bit (965) en cada uno de dichos registros(150; 960) de direccion de memoria indirecta determina un acceso a dicha memoria (160) de datos o a dichamemoria (120) de programa.

    CONFIGURABLE LOGIC CELLS
    3.
    发明申请
    CONFIGURABLE LOGIC CELLS 审中-公开
    可配置逻辑电池

    公开(公告)号:WO2012145511A3

    公开(公告)日:2013-02-14

    申请号:PCT/US2012034250

    申请日:2012-04-19

    CPC classification number: H03K19/17708 G06F15/7867

    Abstract: An integrated circuit device, in accordance with embodiments as claimed includes a central processing core; and a plurality of peripherals operably coupled to the RISC CPU core. In some embodiments, the plurality of peripherals include at least one configurable logic cell peripheral having more inputs than input-output connections on the integrated circuit device. In some embodiments, the inputs include one or more inputs from one or more integrated circuit subsystems.

    Abstract translation: 根据权利要求的实施例的集成电路装置包括中央处理核心; 以及可操作地耦合到RISC CPU核心的多个外围设备。 在一些实施例中,多个外围设备包括具有比集成电路设备上的输入 - 输出连接更多的输入的至少一个可配置逻辑单元外围设备。 在一些实施例中,输入包括来自一个或多个集成电路子系统的一个或多个输入。

    CONSTANT BRIGHTNESS LED DRIVE COMMUNICATIONS PORT
    5.
    发明申请
    CONSTANT BRIGHTNESS LED DRIVE COMMUNICATIONS PORT 审中-公开
    恒定亮度LED驱动通讯端口

    公开(公告)号:WO2014149596A3

    公开(公告)日:2014-11-13

    申请号:PCT/US2014019797

    申请日:2014-03-03

    CPC classification number: H05B37/02 H05B33/0818 H05B33/0845 Y02B20/346

    Abstract: A light emitting diode (LED) is driven with a plurality of pulses having controllable pulse widths and positions within clock time periods that provide for both LED light intensity control and digital information communications from a single output node of an integrated circuit (IC) device. The LED light intensity is determined by the duty cycle of the pulses where the human eye integrates these light pulses from the LED into continuous light intensity levels. The digital information contained in the light output from the LED is detected by a photo-detector that converts the light pulses into electric signals that are demodulated and read by a circuit debugger and/or manufacturing test station. The aforementioned operations allow continuous visual display and data transmission using only one output node of the IC device. This is especially advantageous when using low pin count IC devices.

    Abstract translation: 发光二极管(LED)由具有可控脉冲宽度的脉冲和在时钟周期内的位置驱动,多个脉冲提供来自集成电路(IC)装置的单个输出节点的LED光强度控制和数字信息通信。 LED光强度由人眼将这些光脉冲从LED整合为连续光强度的脉冲的占空比确定。 包含在LED的光输出中的数字信息由光检测器检测,该光检测器将光脉冲转换成由电路调试器和/或制造测试台解调和读取的电信号。 上述操作允许仅使用IC器件的一个输出节点进行连续可视显示和数据传输。 当使用低引脚数IC器件时,这是特别有利的。

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