Light-emitting semiconductor chip and method for manufacturing semiconductor chip of this type
    1.
    发明专利
    Light-emitting semiconductor chip and method for manufacturing semiconductor chip of this type 审中-公开
    用于制造这种类型的半导体芯片的发光半导体芯片和方法

    公开(公告)号:JP2005244245A

    公开(公告)日:2005-09-08

    申请号:JP2005054738

    申请日:2005-02-28

    CPC classification number: H01L33/44

    Abstract: PROBLEM TO BE SOLVED: To provide a light-emitting semiconductor chip 1 which comprises an array 3 of semiconductor layers containing an activity layer 2 which forms electromagnetic radiation, and a passivation layer 12, disposed in the exit side of the array of the layers and which enables radiation emission to be adjusted and set to a target range during the manufacturing period to be more simple and lower cost than in the conventional technology. SOLUTION: The passivation layer has partially absorbing properties, and the transmittance to the radiation emitted from the array of the semiconductor layers during the operation of the semiconductor chip, can be adjusted during the manufacturing period of the passivation layer. COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 解决的问题:提供一种发光半导体芯片1,其包括包含形成电磁辐射的活性层2的半导体层阵列3和钝化层12,该钝化层设置在阵列的出射侧 使得能够在制造期间将辐射调节和设定为目标范围的层比现有技术更简单且更低的成本。 解决方案:钝化层具有部分吸收特性,并且可以在钝化层的制造周期期间调整在半导体芯片的操作期间从半导体层的阵列发射的辐射的透射率。 版权所有(C)2005,JPO&NCIPI

    Light emitting diode chip having radiation transparent and electric current extension layer
    3.
    发明专利
    Light emitting diode chip having radiation transparent and electric current extension layer 审中-公开
    具有辐射透明和电流扩展层的发光二极管芯片

    公开(公告)号:JP2004214685A

    公开(公告)日:2004-07-29

    申请号:JP2004000661

    申请日:2004-01-05

    CPC classification number: H01L33/42 H01L33/14

    Abstract: PROBLEM TO BE SOLVED: To provide a light emitting diode chip having an epitaxial semiconductor layer row equipped with an activity layer which emits electromagnetic radiation, and an electric contact structure which contains a radiation transparent and electric current extension layer comprising ZnO, and an electric connection layer, in which the loss by absorption in an electric connection region is reduced. SOLUTION: The current extension layer has a window where the connection layer is deposited on a covering layer of the semiconductor layer row. The connection layer is connected electrically with the current extension layer. The joint part of the connection layer and the covering layer is not connected electrically or is in bad conductive connection status during operation of the light emitting diode chip. All currents or almost all currents flow in the semiconductor layer row through the current extension layer. COPYRIGHT: (C)2004,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种具有外延半导体层行的发光二极管芯片,其具有发射电磁辐射的活性层,以及含有包含ZnO的辐射透明和电流延伸层的电接触结构,以及 电连接层中的电连接区域的吸收损失减小的电连接层。 解决方案:当前的延伸层具有连接层沉积在半导体层行的覆盖层上的窗口。 连接层与电流延伸层电连接。 连接层和覆盖层的接合部分在发光二极管芯片的操作期间没有电连接或者导电连接状态不良。 所有电流或几乎所有电流在半导体层行中流过电流延伸层。 版权所有(C)2004,JPO&NCIPI

    METHOD FOR PRODUCING A THIN-FILM SEMICONDUCTOR CHIP
    9.
    发明申请
    METHOD FOR PRODUCING A THIN-FILM SEMICONDUCTOR CHIP 审中-公开
    制造薄膜半导体芯片的方法

    公开(公告)号:WO2006034686A3

    公开(公告)日:2006-11-02

    申请号:PCT/DE2005001684

    申请日:2005-09-23

    Abstract: The invention relates to two methods for producing a thin-film semiconductor chip based on a III/V-III/V connection semiconductor material, said thin-film semiconductor chip being suitable for generating electromagnetic radiation. According to the first method, an series of active layers (1), capable of generating electromagnetic radiation, is applied to a growth substrate (2), the front face (12) of said series facing the growth substrate (2) and the rear face (11) facing away from the growth substrate (2). At least one dielectric layer (3) is applied to the rear face (11) of the series of active layers (1) as part of a reflective series of layers (51) and energy is applied with the aid of a laser in restricted volumetric areas (8) of the dielectric layer (3) to create at least one opening (4) facing towards the rear face (11) of the active series of layers (1). At least one metallic layer (5) is then applied as an additional part of the reflective series of layers (51) so that the opening (4) is filled with metallic material and at least one rear electrically conductive contact point (6) is configured that faces towards the rear face (11) of the active series of layers (1). A support (8) is then applied to the reflective series of layers (51) and the growth substrate (2) is removed. According to the second method, a reflective series of layers (51) is applied to the active series of layers (1) and energy is then applied with the aid of a laser in a restricted volumetric area (6) of the reflective series of layers (51) to create at least one rear electrically conductive contact point (6) facing towards the rear face (11) of the active series of layers (1).

    Abstract translation: 描述了用于制造基于III / V-III / V化合物半导体材料的薄膜半导体芯片的两种方法,其中薄膜半导体芯片适于产生电磁辐射。 根据第一方法,有源层序列(1),其适于产生电磁辐射,在生长衬底(2)上,具有与生长衬底(2)表示的前侧(12)和一从生长衬底开创性(2)背面(11 )应用。 在有源层序列的背面侧(11)(1)进一步施加至少一个电介质层(3)用激光的在介电层的限定的体积限定的区域(8)的帮助下引入的反射层序列(51)和能量的部分(3) ,从而形成到有源层序列(1)的背部(11)的至少一个开口(4)。 接着,(5)被至少施加金属层,作为反射层序列(51)的另一部分,以使所述开口(4)被填充有金属材料和至少一个后导电接触点(6)朝向所述有源层序列的后部(11) (1)形成。 之后,载体(8)中的一个安装在反射层序列(51)上并从生长衬底(2)上移除。 根据第二方法,在有源层序列的反射层序列(51)(1)被施加,然后能量引入限定的有限的体积区域(6)的反射层(51)通过激光的手段,使得至少一个后部导电接触点( 6)朝向有源层序列(1)的后侧(11)形成。

    10.
    发明专利
    未知

    公开(公告)号:DE10346605A1

    公开(公告)日:2005-03-31

    申请号:DE10346605

    申请日:2003-10-07

    Abstract: The invention relates to a radiation emitting semi-conductor element with a semi-conductor body, comprising a first main surface (5), a second main surface (9) and a semi-conductor layer sequence (4) with an active zone (7) generating electromagnetic radiation. The semi-conductor layer sequence (4) is arranged between the first and the second main surface (5,9), a first current expansion layer (3) is arranged on the first main surface (5) and is joined in an electrically conducting manner to the semi-conductor layer sequence (4) and a second current expansion layer (10) is arranged on the second main surface (9) and is joined in an electrically conducting manner to the semi-conductor layer sequence (4).

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