公开(公告)号：JPS61102782A

公开(公告)日：1986-05-21

申请号：JP23854285

申请日：1985-10-23

Applicant: Sgs Thomson Microelectronics

Inventor： CONTIERO CLAUDIO

IPC: H01L29/78 ,  H01L21/225 ,  H01L21/336

CPC classification number: H01L29/66712 ,  H01L21/2257

公开(公告)号：DE69410251T2

公开(公告)日：1998-10-01

申请号：DE69410251

申请日：1994-06-20

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： DIAZZI CLAUDIO ,  MURARI BRUNO ,  MASTROMATTEO UBALDO ,  CONTIERO CLAUDIO

IPC: H01L21/76 ,  H01L21/822 ,  H01L23/31 ,  H01L23/58 ,  H01L27/04

公开(公告)号：IT8424139D0

公开(公告)日：1984-12-20

申请号：IT2413984

申请日：1984-12-20

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： CONTIERO CLAUDIO ,  IANNUZZI GIULIO ,  SANTI GIORGIO DE ,  ANDREANI FABRIZIO

IPC: H01L23/52 ,  H01L21/28 ,  H01L21/3205 ,  H01L23/532 ,  H01L

公开(公告)号：IT1235843B

公开(公告)日：1992-11-03

申请号：IT8362689

申请日：1989-06-14

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： CONTIERO CLAUDIO ,  GALBIATI PAOLA ,  ZULLINO LUCIA

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/8234 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/092 ,  H01L29/732 ,  H01L29/78 ,  H01L

公开(公告)号：ITMI920344D0

公开(公告)日：1992-02-18

申请号：ITMI920344

申请日：1992-02-18

Applicant: ST MICROELECTRONICS SRL ,  SGS THOMSON MICROELECTRONICS

Inventor： CONTIERO CLAUDIO ,  GALBIATI MARIA PAOLA ,  ZULLINO LUCIA

IPC: H01L21/765 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L

Abstract: The breakdown voltage of a VDMOS transistor is markedly increased without depressing other electrical characteristics of the device by tying the potential of a field-isolation diffusion, formed under the edge portion of a strip of field oxide separating a matrix of source cells from a drain diffusion, to the source potential of the transistor. This may be achieved by extending a body region of a peripheral source cell every given number of peripheral cells facing the strip of field-isolation structure until it intersects said field-isolation diffusion. By so connecting one peripheral source cell every given number of cells, the actual decrement of the overall channel width of the integrated transistor is negligible, thus leaving unaltered the electrical characteristics of the power transistor.

公开(公告)号：IT1213261B

公开(公告)日：1989-12-14

申请号：IT2413984

申请日：1984-12-20

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： CONTIERO CLAUDIO ,  IANNUZZI GIULIO ,  SANTI GIORGIO DE ,  ANDREANI FABRIZIO

IPC: H01L23/52 ,  H01L21/28 ,  H01L21/3205 ,  H01L23/532 ,  H01L

公开(公告)号：IT8424126D0

公开(公告)日：1984-12-18

申请号：IT2412684

申请日：1984-12-18

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： CONTIERO CLAUDIO ,  GALBIATI PAOLA

IPC: H01L27/092 ,  H01L21/8238 ,  H01L27/04 ,  H01L27/088 ,  H01L29/78 ,  C07C

Abstract: The disclosed bridge circuit is fabricated using power MOS technology. Common terminals of the bridge circuit are integrated into common regions in the implementation. Electrodes, typically coupled together in the bridge circuit, are implemented by a shared conducting region in the integrated circuit of the semiconductor chip. By integrating the elements of the circuit, less area of the semiconductor chip is required as compared to an implementation involving 4 (four) discrete elements. Diodes are fabricated across the transistors to protect the elements against reverse biasing.

公开(公告)号：DE3788438T2

公开(公告)日：1994-04-07

申请号：DE3788438

申请日：1987-01-21

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： CONTIERO CLAUDIO ,  GALBIATI PAOLA ,  ANDREINI ANTONIO

IPC: H01L21/22 ,  H01L21/225 ,  H01L21/265 ,  H01L21/8222 ,  H01L21/8234 ,  H01L21/8236 ,  H01L21/8238 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/78 ,  H01L21/82

Abstract: This method, requiring a smaller number of masking steps with respect to the known methods, comprises boron implant (25) on the surface of an epitaxial layer (2), without masking, and arsenic implant (28) in predetermined locations of the epitaxial layer surface by means of an appropriate mask (27). A subsequent thermal treatment then leads to diffusion of the implanted arsenic and boron atoms (72,35-37), but boron diffusion in the regions in which arsenic implant has also occurred is prevented by the interaction with the latter, to thereby obtain regions with an N⁺ type conductivity where both boron and arsenic have been implanted and regions of P type conductivity where only boron has been implanted

公开(公告)号：DE3788438D1

公开(公告)日：1994-01-27

申请号：DE3788438

申请日：1987-01-21

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： CONTIERO CLAUDIO ,  GALBIATI PAOLA ,  ANDREINI ANTONIO

IPC: H01L21/22 ,  H01L21/225 ,  H01L21/265 ,  H01L21/8222 ,  H01L21/8234 ,  H01L21/8236 ,  H01L21/8238 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/78 ,  H01L21/82

Abstract: This method, requiring a smaller number of masking steps with respect to the known methods, comprises boron implant (25) on the surface of an epitaxial layer (2), without masking, and arsenic implant (28) in predetermined locations of the epitaxial layer surface by means of an appropriate mask (27). A subsequent thermal treatment then leads to diffusion of the implanted arsenic and boron atoms (72,35-37), but boron diffusion in the regions in which arsenic implant has also occurred is prevented by the interaction with the latter, to thereby obtain regions with an N⁺ type conductivity where both boron and arsenic have been implanted and regions of P type conductivity where only boron has been implanted

公开(公告)号：ITMI920344A1

公开(公告)日：1993-08-19

申请号：ITMI920344

申请日：1992-02-18

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： CONTIERO CLAUDIO ,  GALBIATI PAOLA ,  ZULLINO LUCIA

IPC: H01L20060101 ,  H01L21/765 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78