AMPLIFIER HAVING LOW OFFSET
    1.
    发明专利

    公开(公告)号:JPH10126171A

    公开(公告)日:1998-05-15

    申请号:JP35901596

    申请日:1996-12-27

    Abstract: PROBLEM TO BE SOLVED: To approximate the offset to zero by connecting directly together a drive stage of a complementary push-pull constitution and an output stage, which are cascaded with mutually reverse polarities between the input and output terminals of an amplifier. SOLUTION: A drive stage consists of an input branch part, including a 3rd transistor TR Q3 which is connected in series to a 1st constant current generator G1 between a power terminal and the ground, and a current mirror circuit which includes an output branch part consisting of TR Q4, Q5 and Q6. Then the bases and collectors of the pnp TR Q5 and the npn TR Q6 are connected to an input terminal IN and an output terminal OUT of an amplifier respectively. The emitter of the TR Q5 is connected to a power terminal via a 2nd constant current generator G2, and the emitter of the TR Q6 is grounded via the TR Q4. The output of the drive stage is fetched from the TRs Q5 and Q6 and connected to the bases of the TRs Q1 and Q2 respectively. A bipolar TR can also be converted into an FET.

    2.
    发明专利
    未知

    公开(公告)号:DE69614248D1

    公开(公告)日:2001-09-06

    申请号:DE69614248

    申请日:1996-05-31

    Abstract: A BiCMOS Transconductor differential stage (10) for high frequency filters comprises an input circuit portion having signal inputs (IN+,IN-) and comprising a pair of MOS transistors (M1,M2) having their respective gate terminals (G1,G2) corresponding to the signal inputs as well as an output circuit portion having signal outputs (OUT-,OUT+) and comprising a pair of two-pole transistors (Q1,Q2) connected together with a common base in a circuit node (B) and inserted between inputs (IN+,IN-) and outputs (OUT-,OUT+) in cascode configuration. The stage (10) in accordance with the present invention calls for a switching device (3) associated with at least one of said added two-pole transistors (Q1,Q2) to change the connections between the parasite capacitors present in the transconductor stage. The switching device (3) also comprises at least one added two-pole transistor (Q1x, Q2x) connected in a removable manner in parallel with the corresponding two-pole cascode transistor (Q1,Q2). In a variant embodiment there are also provided respective added MOS transistors (M1x,M2x) connected in parallel with the MOS transistors (M1,M2) of the input portion to change the ratio W:L of each of the input transistors (M1,M2).

    3.
    发明专利
    未知

    公开(公告)号:DE69614501T2

    公开(公告)日:2002-04-11

    申请号:DE69614501

    申请日:1996-03-08

    Abstract: The system described comprises various circuit units (10, 11, 12) each having a capacitor (C0, C1, C2) and charging means (G0, G1, G2) for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop (PLL) which uses one (10) of the circuit units as an adjustable oscillator, and current transducer means (17) which regulate the charging currents of the capacitors (C1, C2) of the circuit units (11, 12) in dependence on the regulated charging current of the capacitor (C0) of the oscillator (10) or the error current of the PLL loop.

    4.
    发明专利
    未知

    公开(公告)号:DE69624460D1

    公开(公告)日:2002-11-28

    申请号:DE69624460

    申请日:1996-01-26

    Abstract: The amplifier described has an output stage constituted by an npn transistor (Q1) and a pnp transistor (Q2) in a push-pull arrangement, and a driver stage. The latter comprises a current-mirror circuit having, in its input branch, a pnp transistor (Q3) in series with a first constant-current generator (G1) and, in its output branch, an npn transistor (Q4), and two complementary transistors (Q5 and Q6) of which the collectors are connected together to the output terminal (OUT) and the bases are connected together to the input terminal (IN) of the amplifier. The emitter of the pnp transistor (Q5) of the driver stage is connected to the positive terminal (vdd) of the supply by means of a second constant-current generator (G2) and to the base of the npn transistor (Q1) of the output stage, and the emitter of the npn transistor (Q6) of the driver stage is connected to the negative terminal (gnd) of the supply by means of the npn transistor (Q4) of the output branch of the current-mirror circuit and to the base of the pnp transistor (Q2) of the output stage. The amplifier has a very low or zero offset (Vos = Vout-Vin).

    5.
    发明专利
    未知

    公开(公告)号:DE69614248T2

    公开(公告)日:2001-11-15

    申请号:DE69614248

    申请日:1996-05-31

    Abstract: A BiCMOS Transconductor differential stage (10) for high frequency filters comprises an input circuit portion having signal inputs (IN+,IN-) and comprising a pair of MOS transistors (M1,M2) having their respective gate terminals (G1,G2) corresponding to the signal inputs as well as an output circuit portion having signal outputs (OUT-,OUT+) and comprising a pair of two-pole transistors (Q1,Q2) connected together with a common base in a circuit node (B) and inserted between inputs (IN+,IN-) and outputs (OUT-,OUT+) in cascode configuration. The stage (10) in accordance with the present invention calls for a switching device (3) associated with at least one of said added two-pole transistors (Q1,Q2) to change the connections between the parasite capacitors present in the transconductor stage. The switching device (3) also comprises at least one added two-pole transistor (Q1x, Q2x) connected in a removable manner in parallel with the corresponding two-pole cascode transistor (Q1,Q2). In a variant embodiment there are also provided respective added MOS transistors (M1x,M2x) connected in parallel with the MOS transistors (M1,M2) of the input portion to change the ratio W:L of each of the input transistors (M1,M2).

    6.
    发明专利
    未知

    公开(公告)号:DE69614501D1

    公开(公告)日:2001-09-20

    申请号:DE69614501

    申请日:1996-03-08

    Abstract: The system described comprises various circuit units (10, 11, 12) each having a capacitor (C0, C1, C2) and charging means (G0, G1, G2) for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop (PLL) which uses one (10) of the circuit units as an adjustable oscillator, and current transducer means (17) which regulate the charging currents of the capacitors (C1, C2) of the circuit units (11, 12) in dependence on the regulated charging current of the capacitor (C0) of the oscillator (10) or the error current of the PLL loop.

    BICMOS TRANSCONDUCTOR DIFFERENTIAL STAGE AND SECOND PASS-BAND FILTER

    公开(公告)号:JPH1075135A

    公开(公告)日:1998-03-17

    申请号:JP14415497

    申请日:1997-06-02

    Abstract: PROBLEM TO BE SOLVED: To realize a BiCMOS transconductor differential stage for a high-frequency filter in which limits or disadvantages limiting a filter device can be canceled by increasing a pass band. SOLUTION: This BiCMOS transconductor differential stage is connected with at least one of double-pole transistors Q1 and Q2, and this device is provided with a switching device 3 for changing the connection between plural parasitic capacitors in the transconductors. This switching device is provided with at least one additional double-pole transistors Q1x and Q2x connected with the double-pole transistors Q1 and Q2 in a cascode array in parallel and in an attachable and detachable fashion.

    8.
    发明专利
    未知

    公开(公告)号:ITTO980416A1

    公开(公告)日:1999-11-15

    申请号:ITTO980416

    申请日:1998-05-15

    Abstract: A waveform track-and-hold circuit receives an analog input signal and generates an analog output signal. The waveform track-and-hold circuit includes a differential separating input stage, a differential separating output stage, first and second charge storage means, and switch means. The first and second charge storage means are coupled between the differential separating input stage and the differential separating output stage, and the switch means are controlled by a logic control signal so as to selectively isolate the first and second charge storage means from the analog input signal. Additionally, the differential separating input stage includes a push-pull input stage connected to the switch means and receiving the analog input signal. In a preferred embodiment, the analog input signal is supplied to the emitters of transistors that form the push-pull input stage, the collectors of the transistors are connected to the switch means, and the transistors are part of current mirror circuits.

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