中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

7 records (took 0.021 seconds)

    STACKED MODULE SYSTEMS AND METHODS
    3.
    发明申请
    STACKED MODULE SYSTEMS AND METHODS 审中-公开
    堆叠模块系统和方法

    公开(公告)号：WO2005114726A2

    公开(公告)日：2005-12-01

    申请号：PCT/US2005016764

    申请日：2005-05-11

    Applicant: STAKTEK GROUP LP ,  WEHRLY DOUGLAS JR ,  CADY JAMES ,  PARTRIDGE JULIAN ,  ROPER DAVID

    Inventor： WEHRLY DOUGLAS JR ,  CADY JAMES ,  PARTRIDGE JULIAN ,  ROPER DAVID

    IPC: H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L23/02

    CPC classification number: H01L25/105 ,  H01L23/3114 ,  H01L23/4985 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2225/107

    Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. The CSPs employed in stacked modules devised in accordance with the present invention are connected with flex circuitry. That flex circuitry may exhibit one or more conductive layers with preferred embodiments having two conductive layers. A form standard is disposed along the lower planar surface and extends laterally beyond the package of one or more CSPs in a stacked module. The form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be comprised of heat conductive material such as copper, for example.

    Abstract translation: 本发明将芯片级封装集成电路（CSP）堆叠成保存PWB或其他板表面积的模块。 根据本发明设计的堆叠模块中采用的CSP与柔性电路连接。 该柔性电路可以呈现一个或多个导电层，优选实施例具有两个导电层。 形式标准沿着下平面表面设置并横向延伸超过堆叠模块中的一个或多个CSP的包装。 形式标准提供了一种物理形式，允许在采用标准连接柔性电路设计时，在广泛的CSP封装系列中发现许多变化的封装尺寸。 在优选实施例中，形式标准例如由导热材料例如铜构成。

    STACKED INTEGRATED CIRCUIT CASCADE SIGNALING SYSTEM AND METHOD
    6.
    发明申请
    STACKED INTEGRATED CIRCUIT CASCADE SIGNALING SYSTEM AND METHOD 审中-公开
    堆叠集成电路CASCADE信号系统和方法

    公开(公告)号：WO2006028693A3

    公开(公告)日：2009-09-03

    申请号：PCT/US2005029867

    申请日：2005-08-23

    Applicant: STAKTEK GROUP LP ,  CADY JAMES ,  RAPPORT RUSSELL ,  WILDER JAMES

    Inventor： CADY JAMES ,  RAPPORT RUSSELL ,  WILDER JAMES

    IPC: H01L23/02 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/48 ,  H01L21/50 ,  H01L23/04 ,  H01L23/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC classification number: H01L25/105 ,  H01L23/4985 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    Abstract: Integrated circuits (ICs) are stacked into modules that conserve PCB or other board surface area. The modules provide for lower capacitance memory signaling systems and methods for connecting stacked CSPs in a serial cascade arrangement. In one preferred embodiment, on-die terminations are used selectively to terminate a cascaded series of conductive paths. In another preferred embodiment, a form standard provides a physical form that allows many of the varying package sizes found in a broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.

    Abstract translation: 集成电路（IC）堆叠成可以节省PCB或其他板表面积的模块。 这些模块提供了较低电容存储器信号系统和用于以串联级联布置连接堆叠CSP的方法。 在一个优选实施例中，选择性地使用管芯端子来终止级联的导电路径。 在另一个优选实施例中，形式标准提供了一种物理形式，其允许在采用标准连接柔性电路设计的同时，在宽范围的CSP封装系列中发现许多变化的封装尺寸。

    CIRCUIT MODULE SYSTEM AND METHOD
    7.
    发明申请
    CIRCUIT MODULE SYSTEM AND METHOD 审中-公开
    电路模块系统和方法

    公开(公告)号：WO2006028643A3

    公开(公告)日：2006-11-30

    申请号：PCT/US2005028547

    申请日：2005-08-10

    Applicant: STAKTEK GROUP LP ,  GOODWIN PAUL ,  CADY JAMES ,  WEHRLY JAMES DOUGLAS JR

    Inventor： GOODWIN PAUL ,  CADY JAMES ,  WEHRLY JAMES DOUGLAS JR

    IPC: H05K7/20 ,  G11C5/00 ,  H01L25/10 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18

    CPC classification number: H05K1/189 ,  G11C5/04 ,  H01L25/105 ,  H01L2224/16 ,  H01L2924/00014 ,  H05K1/0203 ,  H05K1/118 ,  H05K1/181 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/1056 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1572 ,  H01L2224/0401

    Abstract: Flexible circuitry (12) is populated with integrated circuits (18), (ICs) disposed along one or both of its major sides. Contacts (20) distributed along the flexible circuitry provide connection to the ICs. Preferably, the flexible circuitry is disposed about an edge of a rigid, thermally-conductive substrate (14) thus placing the integrated circuitry on one or both sides of the substrate with one or two layers of integrated circuitry on one or both sides of the substrate. In alternative, but also preferred embodiments, the ICs on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are windows, pockets, or cutaway areas in the substrate. Other embodiments may only populate one side of the flexible circuit or may remove substrate material to reduce module profile. In preferred embodiments, the contacts distributed along the flexible circuitry are configured for insertion into an edge connector socket such as those found in general purpose and server computers. Preferred substrates are comprised of thermally conductive material. Extensions from the substrate in preferred embodiments can be expected to reduce thermal module loading and encourage reduced thermal variations amongst the integrated circuits of the module during operation.

    Abstract translation: 柔性电路（12）中装有集成电路（18），（IC），沿其主要侧面或其两侧设置。 沿柔性电路分布的触点（20）提供与IC的连接。 优选地，柔性电路围绕刚性的导热基板（14）的边缘设置，从而将集成电路放置在基板的一侧或两侧上，在该基板的一侧或两侧上具有一层或两层集成电路 。 在替代方案中，也是优选实施例中，最靠近基板的柔性电路侧的IC至少部分地设置在基板中的窗口，凹穴或切口区域中。 其他实施例可以仅填充柔性电路的一侧或者可以移除衬底材料以减少模块轮廓。 在优选实施例中，沿着柔性电路分布的触点被配置为插入到诸如在通用和服务器计算机中找到的边缘连接器插座中。 优选的衬底由导热材料构成。 预期在优选实施例中，来自衬底的延伸可以减少热模块负载并且促进在操作期间模块的集成电路之间的热变化减小。

Patent Agency Ranking