公开(公告)号：WO2005098941A3

公开(公告)日：2006-07-13

申请号：PCT/US2005010756

申请日：2005-03-30

Applicant: STAKTEK GROUP LP ,  CADY JAMES ,  WILDER JAMES ,  ROPER DAVID ,  WEHRLY JR DOUGLAS

Inventor： CADY JAMES ,  WILDER JAMES ,  ROPER DAVID ,  WEHRLY JR DOUGLAS

IPC: H01L23/02 ,  H01L23/10 ,  H01L23/31 ,  H01L23/34 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36

CPC classification number: H01L23/3114 ,  H01L23/4985 ,  H01L23/5386 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01055 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/363 ,  H05K2201/056 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules 10 provided herewith. In a preferred embodiment in accordance with the invention, a form standard 34 provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design 32. In a preferred embodiment, the form standard 34 will be devised of heat transference material such as copper to improve thermal performance. In an alternative embodiment, the form standard 34 may include a heat spreader portion 192 with mounting feet 198. In a preferred embodiment of the memory addressing system, a high speed switching system selects a data line associated with each level of a stacked module 10 to reduce the loading effect upon data signals in memory access.

Abstract translation: 本发明将集成电路（IC）堆叠成节省PWB或其他板表面积的模块。 在另一方面，本发明提供了一种较低电容存储器扩展寻址系统和方法，并且优选地具有本文提供的CSP堆叠模块10。 在根据本发明的优选实施例中，形式标准34提供允许在广泛的CSP封装系列中发现的许多变化的封装尺寸在使用标准连接柔性电路设计32时被有利地使用的物理形式。 优选实施例中，将设计出诸如铜之类的热转移材料的形式标准34以改善热性能。 在替代实施例中，形式标准34可以包括具有安装脚198的散热器部分19.在存储器寻址系统的优选实施例中，高速切换系统选择与堆叠模块10的每个级别相关联的数据线 减少存储器访问中数据信号的负载效应。

公开(公告)号：WO2005112100A3

公开(公告)日：2006-08-24

申请号：PCT/US2005013336

申请日：2005-04-19

Applicant: STAKTEK GROUP LP ,  PARTRIDGE JULIAN ,  WEHRLY JR DOUGLAS

Inventor： PARTRIDGE JULIAN ,  WEHRLY JR DOUGLAS

IPC: H01L23/02 ,  H01L21/44 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36

CPC classification number: H01L23/3114 ,  H01L23/13 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/4985 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/01327 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/363 ,  H05K2201/056 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00

Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a preferred embodiment in accordance with the invention, a form standard associated with one or more CSPs provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the contacts of the lower CSP will be compressed before flex circuitry is attached to a combination of the CSP and a form standard to create lower profile contacts between CSP and the flex circuitry.

Abstract translation: 本发明将芯片级封装集成电路（CSP）堆叠成保存PWB或其他板表面积的模块。 在根据本发明的优选实施例中，与一个或多个CSP相关联的形式标准提供了一种物理形式，其允许在广泛的CSP包装系列中发现的许多变化的包装尺寸被利用，同时使用标准连接柔性 电路设计。 在优选实施例中，在CSP和形式标准的组合连接到柔性电路之前，下CSP的触点将被压缩，以在CSP和柔性电路之间形成下部轮廓接触。

公开(公告)号：EP1730774A4

公开(公告)日：2009-11-25

申请号：EP05735041

申请日：2005-03-30

Applicant: STAKTEK GROUP LP

Inventor： CADY JAMES ,  WILDER JAMES ,  ROPER DAVID ,  WEHRLY JR DOUGLAS

IPC: H01L23/02 ,  H01L23/10 ,  H01L23/31 ,  H01L23/34 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36

CPC classification number: H01L23/3114 ,  H01L23/4985 ,  H01L23/5386 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01055 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/363 ,  H05K2201/056 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/0401

公开(公告)号：EP1741134A4

公开(公告)日：2009-12-02

申请号：EP05737564

申请日：2005-04-19

Applicant: STAKTEK GROUP LP

Inventor： PARTRIDGE JULIAN ,  WEHRLY JR DOUGLAS

IPC: H01L23/02 ,  H01L21/44 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36

CPC classification number: H01L23/3114 ,  H01L23/13 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/4985 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/01327 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/363 ,  H05K2201/056 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00