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    SEMICONDUCTOR CHIP ASSEMBLIES AND COMPONENTS WITH PRESSURE CONTACT
    2.
    发明申请
    SEMICONDUCTOR CHIP ASSEMBLIES AND COMPONENTS WITH PRESSURE CONTACT 审中-公开
    半导体芯片组件和组件与压力接触

    公开(公告)号：WO1994023451A1

    公开(公告)日：1994-10-13

    申请号：PCT/US1994003346

    申请日：1994-03-28

    Applicant: TESSERA, INC.

    Inventor： TESSERA, INC. ,  GRUBE, Gary ,  KHANDROS, Igor ,  MATHIEU, Gaetan

    IPC: H01L23/42

    CPC classification number: H01L24/72 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351 ,  Y10T29/49004 ,  Y10T29/4913 ,  H01L2924/00

    Abstract: A semiconductor chip assembly includes a chip (20), terminals (34) permanently electrically connected to the chip by flexible leads (36) and a resilient element (48) or elements for biasing the terminals away from the chip. The chip is permanently engaged with a substrate (52) having contact pads (58) so that the terminals are disposed between the chip and the substrate and the terminals engage the contact pads under the influence of the force applied by the resilient element. The terminals typically are provided on a flexible sheet-like dielectric interposer (28) and the resilient element is disposed between the interposer and the chip. The assembly of the chip and the terminals can be tested prior to engagement with the substrate. Engagement of this assembly with the substrate does not involve soldering or other complex bonding processes. The assembly may occupy an area only slightly larger than the area of the chip itself.

    Abstract translation: 半导体芯片组件包括芯片（20），通过柔性引线（36）和弹性元件（48）永久地电连接到芯片的端子（34）或用于将端子偏压离开芯片的元件。 芯片与具有接触焊盘（58）的基板（52）永久地接合，使得端子设置在芯片和基板之间，并且端子在由弹性元件施加的力的影响下接合接触焊盘。 端子通常设置在柔性片状电介质插入件（28）上，并且弹性元件设置在插入件和芯片之间。 可以在与基板接合之前测试芯片和端子的组件。 该组件与衬底的接合不涉及焊接或其它复杂的结合工艺。 组件可以占据仅稍大于芯片本身的面积的区域。

    MULTI-LAYER CIRCUIT CONSTRUCTION METHODS AND STRUCTURES WITH CUSTOMIZATION FEATURES AND COMPONENTS FOR USE THEREIN
    3.
    发明申请
    MULTI-LAYER CIRCUIT CONSTRUCTION METHODS AND STRUCTURES WITH CUSTOMIZATION FEATURES AND COMPONENTS FOR USE THEREIN 审中-公开
    多层电路构造方法和结构与自定义特征及组件的使用

    公开(公告)号：WO1993013637A1

    公开(公告)日：1993-07-08

    申请号：PCT/US1992011395

    申请日：1992-12-30

    Applicant: TESSERA, INC.

    Inventor： TESSERA, INC. ,  DISTEFANO, Thomas, H. ,  KHANDROS, Igor ,  GRUBE, Gary, W. ,  EHRENBERG, Scott, G.

    IPC: H05K01/00

    CPC classification number: H05K3/462 ,  H01L21/4857 ,  H01L23/5383 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01R12/523 ,  H05K1/0287 ,  H05K1/029 ,  H05K1/0298 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2201/10666 ,  H05K2203/175 ,  H01L2924/00

    Abstract: A multi-layer circuit panel assembly is formed by laminating circuit panels (10) with interposers (12) incorporating flowable conductive material (48) at interconnect locations and a flowable dielectric material (30, 38) at other locations. Excess materials are captured in reservoirs (20) in the circuit panels. The flowable materials and reservoirs allow the interposers to compress and take up tolerances in the components. The stacked panels may have contacts (538) on their top surfaces, through conductors (527) extending between top and bottom and terminals (530) connected to the bottom end of each through conductor. The terminals and contacts are nonselectively connected to one another at each interface so that wherever a terminal and contact an adjacent panels are aligned with one another, these are connected to one another. This forms composite vertical conductors extending through a plurality of the panels. The selective treatment of the panel top and bottom surfaces provides selective interruptions in the vertical conductors.

    Abstract translation: 多层电路板组件通过层叠具有在互连位置处包含可流动导电材料（48）的插入件（12）的电路板（10）和在其它位置处的可流动电介质材料（30,38）形成。 多余的材料被捕获在电路板中的储存器（20）中。 可流动的材料和储存器允许内插器压缩并占据部件中的公差。 堆叠的板可以在其顶表面上具有通过在顶部和底部之间延伸的导体（527）和连接到每个贯通导体的底端的端子（530）之间的触点（538）。 端子和触头在每个接口处彼此非选择性地连接，使得当端子和邻近的面板彼此对准时，它们彼此连接。 这形成延伸穿过多个面板的复合垂直导体。 面板顶部和底部表面的选择性处理在垂直导体中提供选择性的中断。

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