Abstract:
A microelectronic connection component includes a dielectric sheet (34) having an area array of elongated, strip-like leads (60). Each lead has a terminal end (66) fastened to the sheet and a tip end (68) detachable from the sheet. Each lead extends horizontally parallel to the sheet, from its terminal end to its tip end. The tip ends are attached to a second element, such as another dielectric sheet or a semiconductor wafer (86). The first and second elements are then moved relative to one another to advance the tip end of each lead vertically away from the dielectric sheet and deform the leads into a bent, vertically extensive configuration. The preferred structures provide semiconductor chip assemblies with a planar area array of contacts on the chip, an array of terminals on the sheet positioned so that each terminal is substantially over the corresponding contact, and an array of metal S-shaped ribbons connected between the terminals and contacts. A compliant dielectric material may be provided between the sheet and chip, substantially surrounding the S-shaped ribbons.
Abstract:
A semiconductor chip assembly includes a chip (20), terminals (34) permanently electrically connected to the chip by flexible leads (36) and a resilient element (48) or elements for biasing the terminals away from the chip. The chip is permanently engaged with a substrate (52) having contact pads (58) so that the terminals are disposed between the chip and the substrate and the terminals engage the contact pads under the influence of the force applied by the resilient element. The terminals typically are provided on a flexible sheet-like dielectric interposer (28) and the resilient element is disposed between the interposer and the chip. The assembly of the chip and the terminals can be tested prior to engagement with the substrate. Engagement of this assembly with the substrate does not involve soldering or other complex bonding processes. The assembly may occupy an area only slightly larger than the area of the chip itself.
Abstract:
A substantially continuous layer of a first metal (137) such as copper is provided with strips of a second metal (147) such as gold by selective electroplating of the second metal, or by applying separately formed strips such as lengths of wire. A dielectric support layer (132) is provided in contact with the first metal layer, and the first metal layer is etched to leave strips of the first metal continuous with the strips of the second metal, thereby providing composite leads with the first and second metal strips connected in series. The process provides simple and economical methods of making microelectronic connection components with leads having a flexible, fatigue resistant lead portion formed from a precious metal. The leads may incorporate sections of round cross-sectional shape to facilitate engagement by a bonding tool during use of the component.
Abstract:
A method and an apparatus for providing a planar and compliant interface between a semiconductor chip (120) and its supporting substrate to accommodate for the thermal coefficient of expansion mismatch therebetween. The compliant interface is comprised of a plurality of compliant pads (110) defining channels (117) between adjacent pads. The pads are typically compressed between a flexible film chip carrier (100) and the chip. A compliant filler (170) is further disposed within the channels to form a uniform encapsulation layer having a controlled thickness.
Abstract:
A bonding tool (20) for bonding inner leads (58, 60, 62, 64) to semiconductor chips (50) is arranged to capture and align elongated lead sections (58, 60, 62, 64) extending in any one of plural direction, and preferably, in any one of two mutually orthogonal directions (26, 28). Thus, the tool (20) can be applied to align and bond all of the leads (58, 60, 62, 64) to a chip (50) without turning the tool (20) or the chip (50) even where the leads (58, 60, 62, 64) extend in multiple directions.
Abstract:
A method of manufacturing a semiconductor chip package. A sacrificial layer (100) is used as a base to selectively form an array of conductive pads (110) such that a central region (114) is defined by the pads. A back surface (122) of a semiconductor chip is attached to the sacrificial layer within the central region between the pads so that the contact bearing surface (121) of the chip faces away from the sacrificial layer. The chip contacts are then electrically connected to the respective pads, typically by wire bonding wires (130) therebetween. A liquid encapsulant (140) is then deposited. The encapsulant is cured and the sacrificial layer is either completely removed or is selectively removed to expose a surface of the pads for electrical attachment to a PWB and the back surface of the chip for creating a direct thermal path from the chip to the PWB.
Abstract:
In a semiconductor inner lead bonding process, a connection component having leads is disposed on a chip surface so that leads lie above contacts (54). A bond region (62) of each lead is forced downwardly by a tool (60) into engagement with a contact (54) on the chip while a first or proximal end (38) of the lead remains attached to a dielectric support structure. The lead is deformed into an S-shaped configuration by moving the bonding tool (60) horizontally towards the proximal or first end (38) of the lead, thereby forcing the bonding region (62) towards the first end (38) and bending or buckling the lead. Alternatively, the lead is bent downwardly by a tool and the tool may then be disengaged from the lead, shifted away from the proximal end (38) of the lead and again advanced downwardly to secure the lead to the chip contact (54).
Abstract:
A connection component for electrically connecting a semiconductor chip to support substrate incorporates a preferably dielectric supporting structure (70) defining gaps (40). Leads extend across these gaps so that the leads are supported on both sides of the gap (66, 70). The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section (72) adjacent one side of the gap and the frangible section is broken when the lead is engaged with the contact. Final alignment of the leads with the contacts on the chip is provided by the bonding tool which has features adapted to control the position of the lead.
Abstract:
An interposer (50) for interconnection between microelectronic circuit panels (80, 92) has contacts (70, 90) at its surfaces (63, 64). Each contact extends from a central conductor (72), and has a peripheral portion adapted to contract radially inwardly toward the central conductor (72) in response to a force applied by a contact pad (81, 95) defining a central hole (83) on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts (70, 90) contract radially inwardly and wipe across the pads (81, 95). The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.
Abstract:
A connector (10) for microelectronic elements includes a sheetlike body (24) having a plurality of active contacts (22) arranged in a regular grid pattern. The active contacts (22) may include several metallic projections (28) extending inwardly around a hole (27) in the sheetlike element (24), on a first major surface (32). A support structure such as a grid array of noncollapsing structural posts (23) is on a second major surface (33), and each of the posts (23) is electrically connected to one of the active contacts (22). The grid array of the posts (23) and the grid array of active contacts (22) are offset from one another so that an active contact (22) is surrounded by several posts (23). The posts (23) support the sheetlike element (24) spaced away from a substrate (41) to which the posts (23) are attached. A microelectronic element (45) having bump leads (46) thereon may be engaged by contacting the bump leads (46) with the active contacts (22), and deflecting the sheetlike element (24) between the bump leads (46) on one side and the posts (23) on the other side.