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公开(公告)号：KR1020110054128A
公开(公告)日：2011-05-25
申请号：KR1020090110659
申请日：2009-11-17
Applicant: 인하대학교 산학협력단
IPC: H03M1/66
CPC classification number: H03M1/668 , H03M1/662 , H03M2201/6128 , H03M2201/644
Abstract: PURPOSE: A digital-to-analog converter of a current-steering method using a frequency sensing circuit is provided to reduce glitch energy in an output terminal of a digital-to-analog converter by reducing a clock-feedthrough phenomenon and a charge-injection phenomenon. CONSTITUTION: A switch driving circuit unit(300) drives a digital-to-analog differential switch by using a frequency detection circuit according to the control of a frequency detection circuit(100). The frequency detection circuit transfers a control signal for driving a switch driving circuit unit according to the high speed and low speed state of the input signal. The frequency detection circuit includes a comparison unit, a detection unit, a first buffer unit, an electric charge bump circuit and a second buffer unit.
Abstract translation: 目的：提供使用频率感测电路的电流转向方法的数模转换器，以通过减少时钟馈通现象和电荷注入来减少数模转换器的输出端中的毛刺能量 现象。 构成：开关驱动电路单元（300）通过使用频率检测电路根据频率检测电路（100）的控制来驱动数模转差动开关。 频率检测电路根据输入信号的高速和低速状态传送用于驱动开关驱动电路单元的控制信号。 频率检测电路包括比较单元，检测单元，第一缓冲单元，电荷碰撞电路和第二缓冲单元。
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Patent Agency Ranking
公开(公告)号：KR1020100097836A
公开(公告)日：2010-09-06
申请号：KR1020090016688
申请日：2009-02-27
Applicant: 서울대학교산학협력단
CPC classification number: H03M3/478 , H03M1/186 , H03M2201/6107 , H03M2201/6128 , H03M2201/6135
Abstract: PURPOSE: A delta-sigma analog digital converter is provided to obtain a wide operation region by converting a dynamic range through the control of the current which is fed back. CONSTITUTION: A modulator(110) generates an over-sampled PDM(Pulse Density Modulated) signal by converting an analog input current. A post process unit generates digital data corresponding to the analog input current by decreasing a sampling ratio of the generated PDM signal. The post process unit generates a selection signal to control the dynamic range of the modulator. The modulator includes a plurality of current source which generates the current with different sizes. The modulator includes a current supply unit(510) which adds the current generated from the selected current source to the analog input current.
Abstract translation: 目的：提供一个Δ-Σ模拟数字转换器，通过转换反馈电流的控制转换一个动态范围来获得宽的操作区域。 构成：调制器（110）通过转换模拟输入电流产生过采样的PDM（脉冲密度调制）信号。 后处理单元通过减少所生成的PDM信号的采样比来产生与模拟输入电流相对应的数字数据。 后处理单元产生选择信号以控制调制器的动态范围。 调制器包括产生不同尺寸的电流的多个电流源。 调制器包括电流供应单元（510），其将从所选择的电流源产生的电流加到模拟输入电流上。
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公开(公告)号：KR1020080061063A
公开(公告)日：2008-07-02
申请号：KR1020060135861
申请日：2006-12-28
Applicant: 한국 고덴시 주식회사
Inventor： 강근영
IPC: H03M1/12
CPC classification number: H03M1/361 , H03M1/186 , H03M2201/2208 , H03M2201/6128
Abstract: An analog-digital signal converting method and an ADC(Analog Digital Converter) are provided to increase a processing speed of the ADC by correctly converting an analog signal to a digital signal using a reference voltage. A signal converter includes a controller(10), a reference voltage generator(20), and a signal converter(30). The controller generates a reference voltage control signal for setting reference voltages corresponding to analog and digital values and generates a digital signal corresponding to a desired analog signal. The reference voltage generator generates the reference voltage corresponding to the reference voltage control signal from the controller. The signal converter converts the digital signal from the controller to the analog signal by using the reference voltage from the reference voltage generator.
Abstract translation: 提供模拟数字信号转换方法和ADC（模拟数字转换器），以通过使用参考电压将模拟信号正确地转换为数字信号来增加ADC的处理速度。 信号转换器包括控制器（10），参考电压发生器（20）和信号转换器（30）。 控制器产生用于设置与模拟和数字值相对应的参考电压的参考电压控制信号，并产生对应于期望的模拟信号的数字信号。 参考电压发生器产生对应于来自控制器的参考电压控制信号的参考电压。 信号转换器通过使用参考电压发生器的参考电压将数字信号从控制器转换为模拟信号。
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公开(公告)号：KR101884114B1
公开(公告)日：2018-07-31
申请号：KR1020170026168
申请日：2017-02-28
Applicant: 전자부품연구원 , 알에프코어 주식회사
CPC classification number: H03M1/186 , H03M1/14 , H03M2201/6128 , H03M2201/622
Abstract: 기준전압스케일링기법이적용된 ADC가제공된다. 본발명의실시예에따른 ADC는, 제1 범위의전압을입력받아제1 크기의기준전압과비교하여디지털데이터를생성하는제1 sub-ADC 및제2 범위의전압을입력받아제2 크기의기준전압과비교하여디지털데이터를생성하는제2 sub-ADC를포함한다. 이에의해, 파이프라인구조의 ADC에서상위비트를처리하는서브 ADC의입력전압과기준전압을높여서처리할수 있어, 칩면적과소모전력의증가없이도낮은전원전압에서도 SNR을향상시켜 ADC의정밀도를높일수 있게된다.
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公开(公告)号：KR101878593B1
公开(公告)日：2018-07-13
申请号：KR1020170021362
申请日：2017-02-17
Applicant: 서울대학교산학협력단
CPC classification number: H03M1/06 , H03M1/186 , H03M2201/6128 , H03M2201/8152
Abstract: 본기술에의한아날로그디지털변환기는입력전압을기준전압과비교하는제 1 비교기; 제 1 노드의전압을공통전압과비교하는제 2 비교기; 제 1 노드에일단이연결된다수의커패시터를포함하는커패시터어레이; 다수의커패시터의타단을제어하는다수의스위치를포함하는스위치어레이; 제 1 비교기와제 2 비교기의출력에따라스위치어레이를제어하는제어부; 및샘플링신호에따라입력전압을제 1 노드에제공하는샘플링스위치를포함한다.
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公开(公告)号：KR101531921B1
公开(公告)日：2015-06-30
申请号：KR1020140034578
申请日：2014-03-25
Applicant: 한양대학교 에리카산학협력단
IPC: H03M3/02
CPC classification number: H03M3/366 , H03M3/32 , H03M3/39 , H03M2201/6128 , H03M2201/64
Abstract: 본발명은델타-시그마변조기에관한것으로서, 다단적분기피드포워드방식(cascade of integrator feedforward form) 및다단노이즈쉐이핑방식(multi-stage noise-shaping)을이용한델타-시그마변조기에있어서, 입력신호를적분하는제 1 적분기, 상기입력신호의피드포워드신호, 상기제 1 적분기의출력신호, 및상기제 1적분기의피드포워드신호를합산하여적분하는제 2 적분기, 및상기제 2 적분기의출력신호를양자화하는양자화기를포함하고, 상기입력신호의피드포워드신호, 상기제 1 적분기의출력신호, 및상기제 1적분기의피드포워드신호는각각의미분기를거쳐합산되는것을특징으로함으로써, 델타-시그마변조기를간소화할수 있다.
Abstract translation: 本发明涉及一种简化的多位微调Δ-Σ调制器。 在使用级联的积分器前馈形式和多级噪声整形的Δ-Σ调制器中，它包括对输入信号进行积分的第一积分器，将输入信号的前馈信号相加的第二积分器，输入信号的输出信号 第一积分器和第一积分器的前馈信号，以及量化第二积分器的输出信号的量化器。 输入信号的前馈信号，第一积分器的输出信号和第一积分器的前馈信号由每个微分器相加。 从而可以简化Δ-Σ调制。
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