公开(公告)号：US12020942B2

公开(公告)日：2024-06-25

申请号：US17728524

申请日：2022-04-25

Applicant: ULVAC, Inc.

Inventor： Taichi Suzuki ,  Yasuhiro Morikawa ,  Kenta Doi ,  Toshiyuki Nakamura

IPC: H01L21/3065 ,  B81C1/00 ,  C23C14/02 ,  C23C14/34 ,  H01J37/32 ,  H01L21/308 ,  H01L21/311

CPC classification number: H01L21/30655 ,  B81C1/00531 ,  B81C1/00619 ,  C23C14/021 ,  C23C14/34 ,  H01J37/321 ,  H01J37/3244 ,  H01J37/32541 ,  H01J37/32568 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/014 ,  H01J2237/3321 ,  H01J2237/3341 ,  H01J2237/3342

Abstract: An etching method of the invention includes: a resist pattern-forming step of forming a resist layer on a target object, the resist layer being formed of a resin, the resist layer having a resist pattern; an etching step of etching the target object via the resist layer having the resist pattern; and a resist protective film-forming step of forming a resist protective film on the resist layer. The etching step is repetitively carried out multiple times. After the etching steps are repetitively carried out multiple times, the resist protective film-forming step is carried out.

公开(公告)号：US20190244827A1

公开(公告)日：2019-08-08

申请号：US16385345

申请日：2019-04-16

Applicant: FRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.

Inventor： Robert WIELAND

IPC: H01L21/3065 ,  H01J37/32 ,  H01L21/67

CPC classification number: H01L21/30655 ,  B81C1/00619 ,  B81C2201/0112 ,  H01J37/32082 ,  H01J37/32357 ,  H01J37/3244 ,  H01J37/32449 ,  H01J2237/3341 ,  H01L21/67069

Abstract: An etching method for anisotropically structuring a substrate by means of deep reactive-ion etching (DRIE) includes several alternating successive etching steps and passivation steps. According to the invention, a fluorine gas mixture having a proportion of more than 25% up to and including 40% of fluorine, a proportion of 1% to 50% of nitrogen and a proportion of 30% up to and including 60% of a noble gas is used for etching. In addition, the invention concerns the use of such a fluorine gas mixture as well as a corresponding apparatus for structuring a substrate by means of the inventive fluorine gas mixture.

公开(公告)号：US09731964B2

公开(公告)日：2017-08-15

申请号：US15171002

申请日：2016-06-02

Applicant: Nivarox-FAR S.A.

Inventor： Alex Gandelhman ,  Andre Pin

IPC: B81C1/00 ,  G04D99/00 ,  G04B13/02

CPC classification number: B81C1/00619 ,  B81B2201/035 ,  B81B2203/0384 ,  B81C1/00103 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/0138 ,  B81C2201/014 ,  B81C2201/0188 ,  B81C2201/0198 ,  G04B13/02 ,  G04B13/026 ,  G04B13/027 ,  G04D99/00

Abstract: The invention relates to a silicon-based component with at least one reduced contact surface which, formed from a method combining at least one oblique side wall etching step with a “Bosch” etch of vertical side walls, improves, in particular, the tribology of components formed by micromachining a silicon-based wafer.

公开(公告)号：US09688528B2

公开(公告)日：2017-06-27

申请号：US14970933

申请日：2015-12-16

Applicant: FUJIFILM Corporation

Inventor： Takahiro Sano ,  Takayuki Naono

IPC: H04R17/00 ,  B81B3/00 ,  G01C19/56 ,  G01P15/09 ,  H03H9/17 ,  H04R17/10 ,  H01L41/08 ,  H01L41/113 ,  H01L41/319 ,  H04R31/00 ,  B81C1/00 ,  H03H3/02 ,  H03H3/04 ,  G01P15/08

CPC classification number: B81B3/0072 ,  B81B2203/0127 ,  B81B2203/0353 ,  B81B2203/04 ,  B81C1/00666 ,  B81C2201/0112 ,  B81C2201/0169 ,  B81C2201/017 ,  B81C2201/0176 ,  G01C19/56 ,  G01P15/09 ,  G01P2015/084 ,  H01L41/0815 ,  H01L41/1138 ,  H01L41/319 ,  H03H9/17 ,  H03H2003/027 ,  H03H2003/0414 ,  H04R17/10 ,  H04R31/00 ,  H04R2201/003

Abstract: A producing method for a diaphragm-type resonant MEMS device includes forming a first silicon oxide film, forming a second silicon oxide film, forming a lower electrode, forming a piezoelectric film, forming an upper electrode, laminating the first silicon oxide film, the second silicon oxide film, the lower electrode, the piezoelectric film, and the upper electrode in this order on a first surface of a silicon substrate, and etching the opposite side surface of the first surface of the silicon substrate by deep reactive ion etching to form a diaphragm structure, in which the proportion R2 of the film thickness t2 of the second silicon oxide film with respect to the sum of the film thickness t1 of the first silicon oxide film and the film thickness t2 of the second silicon oxide film satisfies the following condition: 0.10 μm≦t1≦2.00 μm; and R2≧0.70.

公开(公告)号：US09478439B2

公开(公告)日：2016-10-25

申请号：US14646909

申请日：2013-11-01

Applicant: BEIJING NMC CO., LTD.

Inventor： Zhongwei Jiang

IPC: H01L21/302 ,  H01L21/3213 ,  H01L21/3065 ,  B81C1/00

CPC classification number: H01L21/32137 ,  B81C1/00531 ,  B81C2201/0112 ,  B81C2201/0132 ,  H01L21/30655

Abstract: Embodiments of the invention provide a substrate etching method, which includes: a deposition operation for depositing a polymer on a side wall of a silicon groove, an etching operation for etching the side wall of the silicon groove, and repeating the deposition operation and the etching operation at least twice. In the process of completing all cycles of the etching operation, a chamber pressure of a reaction chamber is decreased from a preset highest pressure to a preset lowest pressure according to a preset rule. The substrate etching method, according to various embodiments of the invention, avoid the problem of damaging the side wall, thereby making the side wall smooth.

Abstract translation: 本发明的实施例提供了一种基板蚀刻方法，其包括：用于在硅槽的侧壁上沉积聚合物的沉积操作，用于蚀刻硅槽的侧壁的蚀刻操作，以及重复沉积操作和蚀刻 操作至少两次。 在完成蚀刻操作的所有循环的过程中，根据预设规则，反应室的室压力从预设的最高压力降低到预设的最低压力。 根据本发明的各种实施例的基板蚀刻方法避免了损坏侧壁的问题，从而使侧壁平滑。

公开(公告)号：US20160240882A1

公开(公告)日：2016-08-18

申请号：US15027065

申请日：2014-10-02

Applicant: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE ,  UNIVERSITE DE NANTES

Inventor： Christophe Lethien ,  Pascal Tilmant ,  Etienne Eustache ,  Nathalie Rolland ,  Thierry Brousse

IPC: H01M10/02 ,  B81B1/00 ,  H01M10/0585 ,  B81C1/00

CPC classification number: H01M10/02 ,  B81B1/002 ,  B81B2203/0315 ,  B81B2203/0361 ,  B81C1/00047 ,  B81C1/00111 ,  B81C2201/0112 ,  B81C2201/013 ,  B81C2201/0159 ,  H01G11/70 ,  H01M6/40 ,  H01M10/0436 ,  H01M10/052 ,  H01M10/0585 ,  H01M2220/30 ,  Y02E60/13

Abstract: A microstructured substrate includes a plurality of at least one elementary microstructure. An electrical storage device, and more particularly an all-solid-state battery, can include the microstructured substrate.

Abstract translation: 微结构化衬底包括多个至少一个基本微结构。 电存储装置，特别是全固态电池，可以包括微结构化基片。

公开(公告)号：US20160144365A1

公开(公告)日：2016-05-26

申请号：US14903960

申请日：2014-07-08

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Sebastien MERMOZ ,  Lea DI CIOCCIO ,  Thomas MAGIS ,  Loic SANCHEZ

IPC: B01L3/00 ,  B81B1/00 ,  B81C1/00

CPC classification number: B01L3/561 ,  B01L3/502 ,  B01L2200/12 ,  B01L2300/0838 ,  B81B1/002 ,  B81B2201/058 ,  B81C1/00555 ,  B81C1/00626 ,  B81C3/005 ,  B81C2201/0112 ,  H01L21/30655 ,  H01L23/13 ,  H01L2224/95146

Abstract: A method for capillary self-assembly of a plate and a carrier, including: forming an etching mask on a region of a substrate; reactive-ion etching the substrate, the etching using a series of cycles each including isotropic etching followed by surface passivation, wherein a duration of the isotropic etching for each cycle increases from one cycle to another, a ratio between durations of the passivation and etching of each cycle is lower than a ratio for carrying out a vertical anisotropic etching to form a carrier having an upper surface defined by the region and side walls defining an acute angle with the upper surface; removing the etching mask; placing a droplet on the upper surface of the carrier; and placing the plate on the droplet.

Abstract translation: 一种用于板和载体的毛细管自组装的方法，包括：在衬底的区域上形成蚀刻掩模; 反应离子蚀刻衬底，蚀刻使用一系列循环，每个循环包括各向同性蚀刻，然后进行表面钝化，其中每个循环的各向同性蚀刻的持续时间从一个循环增加到另一个周期，钝化和蚀刻的持续时间之间的比率 每个周期低于进行垂直各向异性蚀刻的比例，以形成具有由与上表面限定锐角的区域和侧壁限定的上表面的载体; 去除蚀刻掩模; 在载体的上表面上放置液滴; 并将板放在液滴上。

公开(公告)号：US09318341B2

公开(公告)日：2016-04-19

申请号：US13305992

申请日：2011-11-29

Applicant: Robert P. Chebi ,  Alan Cheshire ,  Gabriel Roupillard ,  Alfredo Granados

Inventor： Robert P. Chebi ,  Alan Cheshire ,  Gabriel Roupillard ,  Alfredo Granados

IPC: C23F1/00 ,  B44C1/22 ,  H01L21/311 ,  H01L21/3065 ,  B81C1/00 ,  H01J37/32 ,  H01L21/67 ,  H01L21/677 ,  H01L21/683

CPC classification number: H01L21/30655 ,  B81B2203/033 ,  B81C1/00619 ,  B81C2201/0112 ,  H01J37/32403 ,  H01L21/67069 ,  H01L21/67748 ,  H01L21/6831

Abstract: Methods for etching a substrate in a plasma etch reactor may include (a) depositing polymer on surfaces of a feature formed in substrate disposed in the etch reactor using first reactive species formed from a first process gas comprising a polymer forming gas; (b) etching the bottom surface of the feature of the substrate in the etch reactor using a third reactive species formed from a third process gas including an etching gas; and (c) bombarding a bottom surface of the feature with a second reactive species formed from a second process gas comprising one or more of an inert gas, an oxidizing gas, a reducing gas, or the polymer forming gas while at least one of depositing the polymer to remove at least some of the polymer disposed on the bottom surface or etching the bottom surface to at least one of chemically or physically damage the bottom surface.

Abstract translation: 用于蚀刻等离子体蚀刻反应器中的衬底的方法可以包括（a）使用由包含聚合物形成气体的第一工艺气体形成的第一反应性物质将形成在衬底中的特征的表面上沉积聚合物; （b）使用由包括蚀刻气体的第三工艺气体形成的第三反应性物质蚀刻所述蚀刻反应器中所述衬底的所述特征的底表面; 和（c）用包含一种或多种惰性气体，氧化气体，还原性气体或形成聚合物的气体的第二工艺气体形成的第二反应性物质轰击所述特征的底部表面，同时沉积 所述聚合物除去布置在底表面上的至少一些聚合物或蚀刻底表面至少一种化学或物理损伤底表面。

公开(公告)号：US20150191350A1

公开(公告)日：2015-07-09

申请号：US14664967

申请日：2015-03-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Hau Wu ,  Kuei-Sung Chang

IPC: B81C1/00 ,  H01L21/3065

CPC classification number: B81C1/00531 ,  B81B3/0018 ,  B81C1/00357 ,  B81C1/0038 ,  B81C1/00595 ,  B81C1/00801 ,  B81C2201/0112 ,  H01L21/3065 ,  H01L41/332

Abstract: The present disclosure is directed to a device and its method of manufacture in which a protective region is formed below a suspended body. The protective region allows deep reactive ion etching of a bulk silicon body to form a MEMS device without encountering the various problems presented by damage to the silicon caused by backscattering of oxide during over etching periods of DRIE processes.

Abstract translation: 本发明涉及一种装置及其制造方法，其中在悬挂体下方形成保护区域。 保护区域允许体硅体的深反应离子蚀刻以形成MEMS器件，而不会遇到由DRIE工艺的过蚀刻期间的氧化物的后向散射引起的对由硅造成的损坏的各种问题。

公开(公告)号：US09006109B2

公开(公告)日：2015-04-14

申请号：US13851691

申请日：2013-03-27

Applicant: Infineon Technologies AG

Inventor： Manfred Engelhardt ,  Martin Zgaga

IPC: H01L21/311 ,  B81C1/00 ,  B81B3/00

CPC classification number: B81B3/001 ,  B81B3/0051 ,  B81C1/00531 ,  B81C1/00626 ,  B81C2201/0112 ,  B81C2201/0132 ,  H01L21/30655

Abstract: A method includes a step of performing a time multiplexed etching process, wherein the last etching step of the time multiplexed etching process is of a first time duration. After performing the time multiplexed etching process, an etching step having a second time duration is performed, wherein the second time duration is greater than the first time duration.

Abstract translation: 一种方法包括执行时间复用蚀刻工艺的步骤，其中时间复用蚀刻工艺的最后一个蚀刻步骤是第一持续时间。 在执行时间复用蚀刻处理之后，执行具有第二持续时间的蚀刻步骤，其中第二持续时间大于第一持续时间。