公开(公告)号：US07927997B2

公开(公告)日：2011-04-19

申请号：US11579299

申请日：2006-03-07

Applicant: Koichi Hirano ,  Seiji Karashima ,  Takashi Ichiryu ,  Yoshihiro Tomita ,  Seiichi Nakatani

Inventor： Koichi Hirano ,  Seiji Karashima ,  Takashi Ichiryu ,  Yoshihiro Tomita ,  Seiichi Nakatani

IPC: H01L21/445

CPC classification number: H01L21/563 ,  B23K35/0244 ,  H01L21/67144 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83815 ,  H01L2224/83886 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/18161 ,  H01L2924/30105 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10977 ,  H05K2203/1361 ,  Y02P70/613 ,  Y10T29/53178 ,  H01L2224/05599

Abstract: To provide a flip-chip mounting method and a bump formation method applicable to flip-chip mounting of a next generation LSI and having high productivity and high reliability.A semiconductor chip 20 having a plurality of electrode terminals 12 is held to oppose a circuit board 21 having a plurality of connection terminals 11 with a given gap provided therebetween, and the semiconductor chip 20 and the circuit board 21 in this state are dipped in a dipping bath 40 containing a melted resin 14 including melted solder particles for a given period of time. In this dipping process, the melted solder particles self-assemble between the connection terminals 11 of the circuit board 21 and the electrode terminals 12 of the semiconductor chip 20, so as to form connectors 22 between these terminals. Thereafter, the semiconductor chip 20 and the circuit board 21 are taken out of the dipping bath 40, and the melted resin 14 having permeated into the gap between the semiconductor chip 20 and the circuit board 21 is cured, so as to complete a flip-chip mounting body.

Abstract translation: 提供适用于下一代LSI的倒装安装并具有高生产率和高可靠性的倒装芯片安装方法和凸块形成方法。 具有多个电极端子12的半导体芯片20被保持为具有多个连接端子11的电路板21，其间设置有给定的间隙，并且在该状态下将半导体芯片20和电路板21浸入 浸渍浴40含有包含熔融的焊料颗粒的熔融树脂14一段给定的时间。 在该浸渍过程中，熔融的焊料颗粒自组装在电路板21的连接端子11和半导体芯片20的电极端子12之间，从而在这些端子之间形成连接器22。 此后，半导体芯片20和电路板21从浸渍浴40中取出，并且已经渗透到半导体芯片20和电路板21之间的间隙中的熔融树脂14固化， 芯片安装体。

公开(公告)号：US07906364B2

公开(公告)日：2011-03-15

申请号：US11791749

申请日：2005-11-29

Applicant: Moshe Kriman ,  Merav Yaakoby

Inventor： Moshe Kriman ,  Merav Yaakoby

IPC: H01L21/00

CPC classification number: H05K3/321 ,  H01L2224/13016 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/81903 ,  H01L2224/83101 ,  H01L2224/83851 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K3/3452 ,  H05K3/361 ,  H05K3/368 ,  H05K2201/0367 ,  H05K2201/09909 ,  H05K2201/10977 ,  H05K2201/2036 ,  H05K2203/1476 ,  Y10T29/4902 ,  Y10T29/49071 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49155 ,  H01L2924/00014

Abstract: A method for connecting substrates having electrical conductive elements thereon, comprising: providing at least one spacer between the substrates; applying a conductive material to at least one of the electrical conductive elements; aligning the electrical conductive elements; and, connecting the substrates by urging them together, wherein the at least one spacer prevents lateral spreading of the conductive material on the substrates from bridging a distance between adjacent conductive elements during the connecting.

Abstract translation: 一种用于连接其上具有导电元件的衬底的方法，包括：在所述衬底之间提供至少一个间隔物; 将导电材料施加到至少一个导电元件; 对准导电元件; 以及通过将它们一起推动而将所述基板连接在一起，其中所述至少一个间隔物防止所述导电材料在所述基板上的横向扩展，从而在连接期间桥接相邻导电元件之间的距离。

公开(公告)号：US07904148B2

公开(公告)日：2011-03-08

申请号：US11517860

申请日：2006-09-07

Applicant: Robert J. Greenberg ,  Neil Talbot ,  Jerry Ok ,  Jordan Neysmith ,  Dao Min Zhou

Inventor： Robert J. Greenberg ,  Neil Talbot ,  Jerry Ok ,  Jordan Neysmith ,  Dao Min Zhou

IPC: A61N1/00

CPC classification number: A61N1/3758 ,  A61N1/0543 ,  A61N1/36046 ,  A61N1/375 ,  H01L21/563 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/4985 ,  H01L24/81 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13169 ,  H01L2224/13178 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81469 ,  H01L2224/81478 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1461 ,  H05K1/028 ,  H05K1/0306 ,  H05K1/09 ,  H05K1/111 ,  H05K1/113 ,  H05K1/115 ,  H05K1/189 ,  H05K3/10 ,  H05K3/188 ,  H05K3/305 ,  H05K3/321 ,  H05K3/328 ,  H05K3/3436 ,  H05K3/361 ,  H05K3/4015 ,  H05K3/4038 ,  H05K3/4084 ,  H05K3/423 ,  H05K3/4644 ,  H05K3/4652 ,  H05K3/4691 ,  H05K13/0469 ,  H05K2201/09127 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2201/10295 ,  H05K2201/10977 ,  H05K2203/05 ,  H05K2203/06 ,  H05K2203/0733 ,  H05K2203/09 ,  H05K2203/107 ,  H05K2203/1446 ,  H01L2924/00 ,  H01L2224/05599

Abstract: The invention is directed to a method of bonding a hermetically sealed electronics package to an electrode or a flexible circuit and the resulting electronics package, that is suitable for implantation in living tissue, such as for a retinal or cortical electrode array to enable restoration of sight to certain non-sighted individuals. The hermetically sealed electronics package is directly bonded to the flex circuit or electrode by electroplating a biocompatible material, such as platinum or gold, effectively forming a plated rivet-shaped connection, which bonds the flex circuit to the electronics package. The resulting electronic device is biocompatible and is suitable for long-term implantation in living tissue.

Abstract translation: 本发明涉及一种将气密密封的电子封装结合到电极或柔性电路的方法以及所得到的电子封装，其适于植入生物组织，例如用于视网膜或皮质电极阵列，以使视力恢复 对某些无意识的个人。 密封电子封装通过电镀生物相容性材料（例如铂或金）直接结合到柔性电路或电极上，有效地形成电镀铆钉形连接，其将柔性电路连接到电子封装。 所得到的电子装置是生物相容的并且适合长期植入生物体组织。

公开(公告)号：US07859852B2

公开(公告)日：2010-12-28

申请号：US11720801

申请日：2006-08-09

Applicant: Gerhard Wetzel ,  Peter Sprafke ,  Ulrich Trescher

Inventor： Gerhard Wetzel ,  Peter Sprafke ,  Ulrich Trescher

IPC: H05K1/00

CPC classification number: H05K1/147 ,  F16H61/0006 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/49175 ,  H05K1/142 ,  H05K3/0061 ,  H05K5/0082 ,  H05K2201/10977 ,  H05K2201/2018 ,  H05K2203/049 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In a controller, in particular for motor vehicle transmissions, having a holder (1) on which an electronic circuit component (2) and at least one flexible printed-circuit film (3) connected to the electronic circuit component (2) by means of electric connection means (7) are arranged, it is proposed to arrange on the holder (1) a frame component (5) which surrounds the electronic circuit component (2), and to connect the electric connection means (7) connected to the electronic circuit component electrically to the at least one flexible printed-circuit film (3), through at least one opening (15) in the frame component (5).

Abstract translation: 在控制器中，特别是对于机动车辆变速器，具有一个保持器（1），电子电路部件（2）和至少一个柔性印刷电路膜（3）通过以下方式连接到电子电路部件（2） 设置有电连接装置（7），在保持器（1）上布置围绕电子电路部件（2）的框架部件（5），并且连接电子连接装置（7） 电路部件通过框架部件（5）中的至少一个开口（15）与至少一个柔性印刷电路膜（3）电连接。

公开(公告)号：US20100294552A1

公开(公告)日：2010-11-25

申请号：US12777605

申请日：2010-05-11

Applicant: Tsuyoshi KOBAYASHI ,  Michio Horiuchi ,  Yukio Shimizu ,  Yasue Tokutake

Inventor： Tsuyoshi KOBAYASHI ,  Michio Horiuchi ,  Yukio Shimizu ,  Yasue Tokutake

IPC: H05K1/16

CPC classification number: H05K3/325 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01059 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15724 ,  H01L2924/15788 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K3/305 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/10977 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/05432 ,  H01L2924/05042 ,  H01L2924/05032 ,  H01L2924/05442 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: An electronic component (chip) mounted structure includes a chip having a terminal, a wiring board having a terminal electrically connected to the terminal of the chip, and an interposing board disposed between the chip and the wiring board and having a structure including an insulating base material provided with a large number of filamentous conductors penetrating the insulating base material in a thickness direction thereof. The terminal of the chip is electrically connected to the terminal of the wiring board via a plurality of filamentous conductors provided in the interposing board.

Abstract translation: 一种电子部件（芯片）安装结构，包括具有端子的芯片，具有与芯片的端子电连接的端子的布线板以及设置在芯片和布线板之间的插入板，并且具有包括绝缘基底 材料具有在其厚度方向上穿透绝缘基材的大量丝状导体。 芯片的端子通过设置在插入板中的多个丝状导体电连接到布线板的端子。

公开(公告)号：US07838335B2

公开(公告)日：2010-11-23

申请号：US12268050

申请日：2008-11-10

Applicant: Eiji Hayashi ,  Takahiro Sugimura

Inventor： Eiji Hayashi ,  Takahiro Sugimura

IPC: H01L21/48 ,  H01L21/50

CPC classification number: H01L21/565 ,  H01L21/563 ,  H01L23/3114 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/06136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/4826 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/181 ,  H05K3/305 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2203/095 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: The adhesive property of the mold resin exposed to the ball face side of a semiconductor package and under-filling resin is improved, and the manufacturing method of the semiconductor device which can prevent peeling at both interface is obtained. The sputtering step which does sputtering of the ball face side of the semiconductor package whose mold resin in which wax or fatty acid was included exposed to the ball face side by Ar plasma, the step which does flip chip junction of the semiconductor package at wiring substrate upper part after the sputtering step, and the step fills up with under-filling resin between the semiconductor package and the wiring substrate are included.

Abstract translation: 暴露于半导体封装和底充填树脂的球面侧的模制树脂的粘合性得到改善，并且可以获得能够防止两界面剥离的半导体装置的制造方法。 将包含蜡或脂肪酸的模塑树脂的半导体封装的球面侧溅射的溅射步骤通过Ar等离子体暴露于球面侧，在布线基板上进行半导体封装的倒装芯片接合 在溅射步骤之后的上部，并且包括半导体封装和布线基板之间的填充不足的树脂的步骤。

公开(公告)号：US07834455B2

公开(公告)日：2010-11-16

申请号：US12470562

申请日：2009-05-22

Applicant: Takahiro Sugimura ,  Satoshi Imasu ,  Norihiko Sugita ,  Takafumi Betsui

Inventor： Takahiro Sugimura ,  Satoshi Imasu ,  Norihiko Sugita ,  Takafumi Betsui

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K3/305 ,  H01L21/563 ,  H01L24/11 ,  H01L24/29 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/1005 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/1517 ,  H01L2924/15311 ,  H05K1/141 ,  H05K1/181 ,  H05K2201/068 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49128 ,  Y10T29/53178 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/13111 ,  H01L2924/0665 ,  H01L2924/0695

Abstract: The reliability of a semiconductor device which has the semiconductor components which were mounted on the same surface of the same substrate via the bump electrodes with which height differs, and with which package structure differs is improved. Semiconductor component 2 of WPP structure is mounted on the main surface of the interposer substrate which forms a semiconductor device via a plurality of bump electrodes. Semiconductor component 3 of CSP structure is mounted on the main surface of an interposer substrate via a plurality of bump electrodes with larger diameter and contiguity pitch than the above-mentioned bump electrode. And under-filling 4a and 4b mutually different, are filled up between the facing surfaces of this interposer substrate and semiconductor components 2, and between the facing surfaces of the interposer substrate and semiconductor components 3, respectively.

Abstract translation: 具有半导体元件的半导体器件的可靠性提高了通过高度不同的突起电极安装在同一基板的同一表面上的半导体器件的可靠性。 WPP结构的半导体部件2通过多个凸块电极安装在形成半导体器件的插入器基板的主表面上。 CSP结构的半导体部件3通过多个比上述凸起电极具有更大的直径和邻接间距的凸起电极安装在插入基片的主表面上。 并且相互不同的不充分的4a和4b分别填充在该插入器基板和半导体部件2的相对表面之间以及插入器基板和半导体部件3的相对表面之间。

公开(公告)号：US20100276711A1

公开(公告)日：2010-11-04

申请号：US12434242

申请日：2009-05-01

Applicant: Mark Anthony Hand ,  Daniel Sekowski ,  Frederick Lloyd Carpenter ,  Bernhard Bachl ,  Bernd Bienek ,  Olaf Cladders ,  Henning Dieker ,  Christian Miesner ,  Peter Schopper ,  Lothar Schopmann ,  Herfried Zimmer

Inventor： Mark Anthony Hand ,  Daniel Sekowski ,  Frederick Lloyd Carpenter ,  Bernhard Bachl ,  Bernd Bienek ,  Olaf Cladders ,  Henning Dieker ,  Christian Miesner ,  Peter Schopper ,  Lothar Schopmann ,  Herfried Zimmer

IPC: H01L33/00

CPC classification number: H05K3/284 ,  F21K9/00 ,  H05K1/0256 ,  H05K3/301 ,  H05K3/3421 ,  H05K2201/012 ,  H05K2201/10977 ,  H05K2201/2018

Abstract: In a light emitting diode arrangement for lighting purposes, comprising a circuit board with at least one light generating semiconductor element disposed on the circuit board and conductors extending on the circuit board to the semiconductor element and being electrically connected to terminals of the semiconductor element, a light transmissive element is disposed on the circuit board and covers the semiconductor element and a flame resistant cover element is disposed below the light transmissive element and on top of the terminals to cover the terminals to provide for electrical and flame insulation thereof.

Abstract translation: 在用于照明目的的发光二极管装置中，包括具有设置在电路板上的至少一个光产生半导体元件的电路板和在电路板上延伸到半导体元件并与半导体元件的端子电连接的导体， 透光元件设置在电路板上并覆盖半导体元件，并且阻燃覆盖元件设置在透光元件下方并且在端子的顶部上以覆盖端子以提供其电气和火焰绝缘。

公开(公告)号：US20100264541A1

公开(公告)日：2010-10-21

申请号：US12827476

申请日：2010-06-30

Applicant: Teck Kheng Lee

Inventor： Teck Kheng Lee

IPC: H01L23/488 ,  B23K31/02

CPC classification number: H01L24/14 ,  H01L21/4846 ,  H01L23/481 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1012 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/73103 ,  H01L2224/73204 ,  H01L2224/81136 ,  H01L2224/81138 ,  H01L2224/8114 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81208 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/20105 ,  H01L2924/20106 ,  H05K3/06 ,  H05K3/325 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2203/0315 ,  H05K2203/0369 ,  H05K2203/1476 ,  H01L2924/00012

Abstract: A method is disclosed which includes forming a layer of conductive material above a substrate, forming a masking layer above the layer of conductive material, performing a first etching process on the layer of conductive material with the masking layer in place, removing the masking layer and, after removing the masking layer, performing an isotropic etching process on the layer of conductive material to thereby define a plurality of piercing bond structures positioned on the substrate.

Abstract translation: 公开了一种方法，其包括在衬底上形成导电材料层，在导电材料层之上形成掩模层，在掩蔽层就位的导电材料层上执行第一蚀刻工艺，去除掩模层和 在去除掩模层之后，对导电材料层进行各向同性蚀刻处理，从而限定位于基板上的多个穿孔接合结构。

公开(公告)号：US07793413B2

公开(公告)日：2010-09-14

申请号：US11816177

申请日：2006-09-22

Applicant: Tadahiko Sakai ,  Hideki Eifuku

Inventor： Tadahiko Sakai ,  Hideki Eifuku

IPC: H05K3/34 ,  H05K1/16

CPC classification number: H05K3/3436 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75252 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0781 ,  H05K3/323 ,  H05K3/3484 ,  H05K3/3494 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/0475 ,  H05K2203/1189 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/05599

Abstract: An electronic component mounting method for mounting a electronic component on a board, in which an Au bump provided at an electronic component is joined to a joining terminal formed on a board by using solder made of Sn or solder containing Sn and the electronic component is adhered to the board by means of thermosetting resin thereby to mount the electronic component on the board. The applied thermosetting resin is flown toward the outside by the lower surface of the electronic component, then a part of the solder particles contained within the thermosetting resin are made in contact with the side surfaces of the Au bumps which are heated to the temperature higher than the melting point of the solder and also another part of the solder particles are molten in a state of being sandwiched between the Au bumps and the electrodes. Thus, the diffusion of Sn into the Au bumps from the outside is promoted and so the density of Sn within the Au bumps can be increased. Further, the diffusion of Sn into the Au bump from a solder joining portion can be suppressed and so the generation of Kirkendall voids can be suppressed.

Abstract translation: 一种用于将电子部件安装在电子部件上的电子部件安装方法，其中设置在电子部件处的Au凸块通过使用由Sn制成的焊料或包含Sn的焊料和电子部件而接合到形成在板上的接合端子，并且电子部件被粘合 通过热固性树脂到板上，从而将电子部件安装在板上。 涂布的热固性树脂通过电子部件的下表面向外部流动，然后使包含在热固性树脂内的焊料颗粒的一部分与Au凸块的侧表面接触，该凸块被加热到高于 焊料的熔点以及焊料颗粒的另一部分在夹在Au凸块和电极之间的状态下熔融。 因此，促进了Sn从外部扩散到Au凸块中，因此可以增加Au凸块内的Sn的密度。 此外，可以抑制Sn从焊料接合部扩散到Au凸块中，因此可以抑制Kirkendall空隙的产生。