公开(公告)号：US20100051329A1

公开(公告)日：2010-03-04

申请号：US12429042

申请日：2009-04-23

Applicant: Tae-Hoon KIM ,  Dong-Hoon Kim ,  Young-Il Lee ,  Sang-Gyun Lee ,  Byung-Ho Jun ,  Da-Mi Shim

Inventor： Tae-Hoon KIM ,  Dong-Hoon Kim ,  Young-Il Lee ,  Sang-Gyun Lee ,  Byung-Ho Jun ,  Da-Mi Shim

IPC: H05K1/03 ,  H05K3/12 ,  H05K1/09

CPC classification number: H05K3/108 ,  H05K3/125 ,  H05K3/181 ,  H05K3/245 ,  H05K2201/035 ,  H05K2203/013 ,  Y10T29/49155

Abstract: Disclosed are a printed circuit board and a method of manufacturing the same. The method in accordance with an embodiment of the present invention includes: forming an electroless plated layer on an insulation layer; and forming a circuit pattern by applying conductive ink on the electroless plated layer through an inkjet method.

Abstract translation: 公开了一种印刷电路板及其制造方法。 根据本发明实施例的方法包括：在绝缘层上形成化学镀层; 以及通过喷墨方法在所述化学镀层上施加导电油墨来形成电路图案。

公开(公告)号：US20100015468A1

公开(公告)日：2010-01-21

申请号：US12519571

申请日：2007-12-21

Applicant: Yasuyuki Yamamoto ,  Masakatsu Maeda ,  Osamu Yatabe

Inventor： Yasuyuki Yamamoto ,  Masakatsu Maeda ,  Osamu Yatabe

IPC: B32B15/04 ,  B05D3/02

CPC classification number: H05K3/38 ,  C04B41/009 ,  C04B41/52 ,  C04B41/90 ,  C04B2111/00844 ,  H01L21/4867 ,  H01L23/3735 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/248 ,  H05K2201/0347 ,  H05K2201/035 ,  Y10T428/12576 ,  C04B35/581 ,  C04B41/4517 ,  C04B41/4539 ,  C04B41/5133 ,  C04B41/4541 ,  C04B41/5144 ,  C04B41/5127 ,  C04B41/522 ,  C04B41/5116 ,  H01L2924/00

Abstract: A method for manufacturing metallized aluminum nitride substrate. The method includes: Step A for forming a high-melting point metal layer over a sintered aluminum nitride substrate; Step B for forming over the high-melting point metal layer an intermediate metal layer of at least one selected from the group of: nickel, copper, copper-silver, copper-tin, and gold by plate processing; and Step C for forming a surface metal layer containing silver as a main component over the intermediate metal layer by coating a silver paste whose glass component content is 1 mass % or less and firing under nonoxidizing atmosphere. By this method, it is capable of forming a glass component-free silver layer which is adhered at a high degree of adhesion strength onto the high-melting point metal layer formed over the aluminum nitride substrate as a top face by thick-film method using a silver paste which makes thick-membrane forming easier.

Abstract translation: 金属化氮化铝基板的制造方法。 该方法包括：步骤A，用于在烧结的氮化铝衬底上形成高熔点金属层; 步骤B，通过板加工在高熔点金属层上形成选自镍，铜，铜 - 银，铜 - 锡和金中的至少一种的中间金属层; 以及步骤C，通过涂覆玻璃成分含量为1质量％以下的银膏，在非氧化性气氛下进行烧成，在中间金属层上形成含有银为主要成分的表面金属层。 通过该方法，能够通过厚膜法以高膜法形成以高粘合强度粘附在形成在氮化铝基板上的高熔点金属层上的无玻璃成分的银层， 使得较厚膜形成更容易的银糊。

公开(公告)号：US07423513B2

公开(公告)日：2008-09-09

申请号：US10855342

申请日：2004-05-28

Applicant: Koichi Tanaka

Inventor： Koichi Tanaka

IPC: H01C10/32

CPC classification number: H01C17/24 ,  H01C17/22 ,  H05K1/167 ,  H05K2201/0347 ,  H05K2201/035 ,  H05K2203/171

Abstract: A circuit board high in reliability and a method for manufacturing the circuit board are provided. The electrical resistance is accurately adjustable without damaging the circuit body even if it is made of resinous material and is free from a change over time. A circuit board in which a resistor (16) consisting of a resistor paste is printed between electrodes (14a) formed on a circuit pattern (14) printed on a printed circuit board (11), wherein a conductor (18) for adjusting the electrical resistance value of the resistor is coated on the surface of the resistor.

Abstract translation: 提供了高可靠性的电路板和制造电路板的方法。 电阻精确可调，即使是由树脂材料制成，也不会随时间变化而损坏电路体。 在形成在印刷在印刷电路板（11）上的电路图案（14）上的电极（14A）之间印刷由电阻膏组成的电阻器（16）的电路板，其中， 电阻器的电阻值涂在电阻表面上。

公开(公告)号：US20080179379A1

公开(公告)日：2008-07-31

申请号：US11866607

申请日：2007-10-03

Applicant: Hiroshi AKAMATSU ,  Yukinori KAWAMURA ,  Hiroshi KAI ,  Osamu KURAMOTO ,  Shigeru IWASAKI ,  Kenji ASAI ,  Minoru HIBINO

Inventor： Hiroshi AKAMATSU ,  Yukinori KAWAMURA ,  Hiroshi KAI ,  Osamu KURAMOTO ,  Shigeru IWASAKI ,  Kenji ASAI ,  Minoru HIBINO

IPC: B23K35/14

CPC classification number: H05K3/3415 ,  B23K3/0638 ,  B23K2101/42 ,  H05K3/3463 ,  H05K3/3484 ,  H05K2201/035 ,  H05K2201/10992 ,  H05K2203/0545 ,  H05K2203/111 ,  H05K2203/1121 ,  H05K2203/1476 ,  Y02P70/613 ,  Y10T428/12493

Abstract: A structure of solder joint structure formed of zinc-based lead-free solder having excellent characteristics is disclosed. Between a first lead-free solder layer and a soldering pad, the following layers are formed: a tin-copper alloy layer formed on the pad; a first alloy layer formed of second lead-free layer of which main ingredients are tin and silver; and a second alloy layer formed between the first alloy layer and the first lead-free solder. This structure allows forming the solder joint structure formed of zinc-based lead-free solder having high joint strength.

Abstract translation: 公开了由具有优异特性的锌基无铅焊料形成的焊点结构的结构。 在第一无铅焊料层和焊盘之间形成以下层：形成在焊盘上的锡 - 铜合金层; 由主要成分为锡和银的第二无铅层形成的第一合金层; 以及形成在第一合金层和第一无铅焊料之间的第二合金层。 这种结构允许形成由具有高接合强度的锌基无铅焊料形成的焊点结构。

公开(公告)号：US20080138934A1

公开(公告)日：2008-06-12

申请号：US12019439

申请日：2008-01-24

Applicant: Se-Nyun KIM ,  Heung-Kyu KWON ,  Ki-Myung YOON

Inventor： Se-Nyun KIM ,  Heung-Kyu KWON ,  Ki-Myung YOON

IPC: H01L21/60

CPC classification number: H01L25/50 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/035 ,  H05K2201/10515 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacturing a multi-stack package that ensures easy application of a solder paste or a flux. The method includes forming a first package comprising a first substrate on which bumps are arranged and a second package comprising a second substrate on which electrode pads corresponding to the bumps are arranged, applying a solder paste on the bumps of the first package, and electrically connecting the bumps of the first package and the electrode pads of the second package.

Abstract translation: 一种制造多层封装的方法，其确保容易地应用焊膏或焊剂。 该方法包括形成第一封装，其包括布置有凸块的第一基板和包括第二基板的第二封装，第二基板上布置有与凸块对应的电极焊盘，在第一封装的凸块上施加焊膏， 第一封装的凸块和第二封装的电极焊盘。

公开(公告)号：US20080063792A1

公开(公告)日：2008-03-13

申请号：US11976490

申请日：2007-10-25

Applicant: Noriki Hayashi ,  Yoshio Oka ,  Masahiko Kanda ,  Narito Yagi ,  Kenji Miyazaki ,  Kyouichirou Nakatsugi

Inventor： Noriki Hayashi ,  Yoshio Oka ,  Masahiko Kanda ,  Narito Yagi ,  Kenji Miyazaki ,  Kyouichirou Nakatsugi

IPC: H05K3/00

CPC classification number: H05K3/246 ,  H05K1/095 ,  H05K3/108 ,  H05K3/12 ,  H05K3/1216 ,  H05K3/16 ,  H05K3/381 ,  H05K3/388 ,  H05K2201/0347 ,  H05K2201/035 ,  H05K2203/072 ,  H05K2203/095 ,  Y10T29/49126

Abstract: A novel board for printed wiring comprising a fine conductor wiring having a clear and favorable boundary line and fabricated by an ordinal printing method such as screen printing, a printed wiring board using the same, and methods for manufacturing them. A board for printed wiring and a method for manufacturing the same are characterized in that the surface of a board is subjected to one of the surface treatments: (a) roughening, (2) plasma treatment, (3) roughening and then plasma treatment, and (4) roughening and then forming of a metal film coating by sputtering. A printed wiring board and a method for manufacturing the same is characterize in that a conductor wiring is fabricated by printing using a conductive paste containing metal particles the average particle diameter of which is 4 μm or less and the maximum particle diameter of which is 15 μm or less. Another printed wiring board and a method for manufacturing the same is characterized in that the surface of a conductor wiring fabricated using a conductive paste containing metal particles M and a binder B at a volume ratio of M/B of 1/1 to 1.9/1 is etched, a plating coating is formed on the surface.

Abstract translation: 一种用于印刷布线的新型印刷电路板，包括具有透明且有利的边界线的精细导体布线，并通过诸如丝网印刷的顺序印刷法，使用其的印刷线路板及其制造方法制造。 印刷电路板及其制造方法的特征在于，对板的表面进行表面处理之一：（a）粗糙化，（2）等离子体处理，（3）粗糙化，然后进行等离子体处理， 和（4）通过溅射粗化然后形成金属膜涂层。 印刷电路板及其制造方法的特征在于，使用含有平均粒径为4μm以下，最大粒径为15μm的金属粒子的导电糊进行印刷，制造导体布线 或更少。 另一种印刷线路板及其制造方法的特征在于，使用含有金属粒子M和粘合剂B的M / B的体积比为1/1〜1.9 / 1的导电性糊剂制造的导体布线的表面 被蚀刻，在表面上形成镀覆层。

公开(公告)号：US20070297151A1

公开(公告)日：2007-12-27

申请号：US11475528

申请日：2006-06-27

Applicant: Larry E. Mosley ,  James G. Maveety ,  Fay Hua

Inventor： Larry E. Mosley ,  James G. Maveety ,  Fay Hua

IPC: H05K7/00 ,  H01L21/44

CPC classification number: H01L23/49811 ,  H01L23/49883 ,  H01L2224/85447 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/3011 ,  H05K1/095 ,  H05K1/111 ,  H05K1/112 ,  H05K3/06 ,  H05K3/245 ,  H05K3/246 ,  H05K3/3436 ,  H05K2201/0329 ,  H05K2201/0338 ,  H05K2201/0347 ,  H05K2201/035 ,  H01L2924/00

Abstract: An integrated circuit including an interlayer dielectric which may be prone to failure due to processing conditions may be protected by coupling the integrated circuit to a substrate through a solder ball over a conductive polymer. The conductive polymer allows conduction of electrical current to or from the integrated circuit and also provides cushioning against stresses including both mechanical perturbations and thermal expansion and contraction. As a result, relatively lower dielectric constant materials may be utilized as interlayer dielectrics within the integrated circuit.

Abstract translation: 可以通过在导电聚合物上通过焊料球将集成电路耦合到衬底来保护包括可能由于加工条件而导致故障的层间电介质的集成电路。 导电聚合物允许将电流传导到集成电路或从集成电路传导，并且还提供对包括机械扰动和热膨胀和收缩两者的应力的缓冲。 结果，相对较低的介电常数材料可以用作集成电路内的层间电介质。

公开(公告)号：US20070262118A1

公开(公告)日：2007-11-15

申请号：US11743812

申请日：2007-05-03

Applicant: Takeshi MORITA ,  Masanori HIYOSHI

Inventor： Takeshi MORITA ,  Masanori HIYOSHI

IPC: A47J36/02

CPC classification number: H05K3/3489 ,  H01L24/13 ,  H01L24/743 ,  H01L24/75 ,  H01L24/81 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11822 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/014 ,  H05K3/3484 ,  H05K13/0465 ,  H05K2201/035 ,  H05K2201/10734 ,  H05K2203/0338 ,  Y10T29/4913 ,  Y10T29/53178 ,  Y10T29/53183

Abstract: First components and second components in which bumps are formed on the lower surface thereof and laminate structures are formed by mounting them to stack with each other on a circuit board 13 are picked up from a component supply unit 1 using a placement head 16, and by lifting and lowering the placement head 16 holding the first components and the second components relative to a paste transfer device 5 supplying a flux 10 in the manner such as coating films having two types of different thicknesses, the flux 10 is supplied to the bumps of the plurality of components in a bundle using a transfer coating method. With such a configuration, it is possible to efficiently perform a component mounting with a satisfactory adhesiveness by ensuring an optimal amount of application quantity of a paste.

Abstract translation: 在其下表面上形成凸块的第一部件和第二部件以及通过在电路板13上将它们彼此堆叠而形成的层叠结构通过使用放置头16从部件供应单元1拾取，并且通过 提升和降低保持第一部件和第二部件的放置头16相对于以诸如具有两种类型的不同厚度的涂膜的方式供给焊剂10的糊剂传递装置5，将焊剂10供应到 使用转印涂布方法的多个组分。 通过这样的结构，可以通过确保最佳施用量的浆料来有效地进行具有令人满意的粘合性的部件安装。

公开(公告)号：US20070228559A1

公开(公告)日：2007-10-04

申请号：US11729115

申请日：2007-03-28

Applicant: Masanori Tsuruko

Inventor： Masanori Tsuruko

IPC: H01L23/48

CPC classification number: H01L23/49816 ,  H01L21/4867 ,  H01L23/49838 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/1403 ,  H05K3/246 ,  H05K3/321 ,  H05K3/4007 ,  H05K2201/0347 ,  H05K2201/035 ,  H05K2201/0367 ,  H05K2201/0391 ,  H05K2201/094 ,  H05K2201/10674

Abstract: A connecting terminal provided on a substrate and a connector provided on an electronic device are connected via a bump formed of a first member, which is formed of an anisotropic conductive paste including particles of a conductive material, and a second member which is different in conductivity from the first member. According to such a structure, since the anisotropic conductive paste which is softer as compared to a solder bump is used, stress applied to an interface between the bump and the connecting terminal is relaxed. Accordingly, reliability of connection can be assured even when using a substrate with large surface irregularities and/or bending, in which stress occurs relatively easily in a connection part of the bump and the connecting terminal.

Abstract translation: 设置在基板上的连接端子和设置在电子设备上的连接器通过由包括导电材料的颗粒的各向异性导电浆料形成的第一构件和导电性不同的第二构件形成的凸块连接 从第一个成员。 根据这样的结构，由于使用与焊料凸点相比较软的各向异性导电糊，所以缓和凸起与连接端子之间的界面的应力。 因此，即使使用具有大的表面不规则和/或弯曲的基板，也可以确保连接的可靠性，其中凸起和连接端子的连接部分中相对容易发生应力。

公开(公告)号：US20070220725A1

公开(公告)日：2007-09-27

申请号：US11754895

申请日：2007-05-29

Applicant: William Borland

Inventor： William Borland

IPC: H01G7/00 ,  H05K3/20

CPC classification number: H05K1/162 ,  H01L27/013 ,  H05K1/092 ,  H05K3/1291 ,  H05K3/4611 ,  H05K3/4623 ,  H05K3/4652 ,  H05K2201/0187 ,  H05K2201/035 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2203/1126 ,  Y10T29/435 ,  Y10T29/49128 ,  Y10T29/49156

Abstract: A method of embedding thick-film capacitors includes etching foil electrodes outside the boundary of the capacitor dielectric to prevent etching solutions from coming in contact with and damaging the capacitor dielectric layers.

Abstract translation: 嵌入厚膜电容器的方法包括在电容器电介质的边界之外蚀刻箔电极，以防止蚀刻溶液与电容器电介质层接触并损坏电容器电介质层。