公开(公告)号：US08125289B2

公开(公告)日：2012-02-28

申请号：US12384943

申请日：2009-04-10

Applicant: Mohammad Tabatabai

Inventor： Mohammad Tabatabai

IPC: H01P3/08

CPC classification number: H01P3/026 ,  H05K1/024 ,  H05K1/0245 ,  H05K2201/0191 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09318

Abstract: According to one exemplary embodiment, a circuit board for reducing dielectric loss, conductor loss, and insertion loss includes a pair of transmission lines. The pair of transmission lines has sufficient thickness to cause substantial broadside electromagnetic coupling between the pair of transmission lines, where the pair of transmission lines is sufficiently separated from a ground plane of the circuit board so as to cause negligible electromagnetic coupling to the ground plane relative to the substantial broadside electromagnetic coupling. The pair of transmission lines thereby reduce dielectric loss, conductor loss, and insertion loss for signals traversing through the transmission line pair. The pair of transmission lines can be separated from the ground plane by, for example, at least 50.0 mils.

Abstract translation: 根据一个示例性实施例，用于降低介质损耗，导体损耗和插入损耗的电路板包括一对传输线。 这对传输线具有足够的厚度，以在一对传输线之间产生实质的宽边电磁耦合，其中一对传输线与电路板的接地平面充分分离，从而使接地平面的电磁耦合可以忽略不计 到实质的宽边电磁耦合。 这对传输线因此减少了穿过传输线对的信号的介质损耗，导体损耗和插入损耗。 这对传输线可以通过例如至少50.0密耳从地平面分离。

公开(公告)号：US08102664B2

公开(公告)日：2012-01-24

申请号：US12357714

申请日：2009-01-22

Applicant: Yasuto Ishimaru ,  Hirofumi Ebe

Inventor： Yasuto Ishimaru ,  Hirofumi Ebe

IPC: H05K1/18

CPC classification number: H05K3/303 ,  H01L23/3735 ,  H01L2224/16225 ,  H05K1/0203 ,  H05K1/0269 ,  H05K1/189 ,  H05K2201/0108 ,  H05K2201/09318 ,  H05K2201/0969 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2203/166 ,  Y02P70/613 ,  Y10T29/49162

Abstract: A mounting region having a rectangular shape is provided at an approximately center of one surface of an insulating layer. A plurality of conductive traces are formed so as to outwardly extend from the inside of the mounting region. A cover insulating layer is formed so as to cover the plurality of conductive traces in a periphery of the mounting region. An electronic component is mounted on the insulating layer so as to overlap with the mounting region. A metal layer is provided on the other surface of the insulating layer. Openings having a rectangular shape are formed in the metal layer along a pair of longer sides and a pair of shorter sides of the mounting region. The openings are opposite to part of terminals of the plurality of conductive traces, respectively, with the insulating layer sandwiched therebetween.

Abstract translation: 在绝缘层的一个表面的大致中心处设置具有矩形形状的安装区域。 多个导电迹线被形成为从安装区域的内部向外延伸。 形成覆盖绝缘层，以覆盖安装区域周边的多个导电迹线。 电子部件安装在绝缘层上以与安装区域重叠。 在绝缘层的另一个表面上设置金属层。 沿着一对长边和安装区域的一对短边在金属层中形成具有矩形形状的开口。 开口分别与多个导电迹线的端子的一部分相对，绝缘层夹在其间。

公开(公告)号：US20110226860A1

公开(公告)日：2011-09-22

申请号：US12830095

申请日：2010-07-02

Applicant: CHEN-JYH FAN ,  Hui-Chuan Chen ,  Ching-Tsung Cheng

Inventor： CHEN-JYH FAN ,  Hui-Chuan Chen ,  Ching-Tsung Cheng

IPC: G06K19/067 ,  H05K7/00 ,  H05K3/30

CPC classification number: G06K19/07749 ,  G06K19/0775 ,  G06K19/07786 ,  H01Q1/2225 ,  H01Q1/38 ,  H01Q9/42 ,  H05K1/0218 ,  H05K1/0243 ,  H05K1/0251 ,  H05K2201/09272 ,  H05K2201/09318 ,  H05K2201/10098 ,  Y10T29/4913

Abstract: A printed circuit board with an antenna for an RFID chip and a method for manufacturing the printed circuit board are provided. The method includes steps of providing a printed circuit board whereon a metal foil layer is disposed; patterning the metal foil layer to form an antenna comprising a first antenna branch and a second antenna branch, wherein the first antenna branch has at least two right-angle turns; and mounting an RFID chip on the metal foil layer so as to be electrically connected to the first antenna branch and the second antenna branch, wherein a via hole is formed between the right-angle turns of the first antenna branch, so that the first antenna branch is electrically connected to a metal conductor inside or on the back of the printed circuit board through the via hole.

Abstract translation: 提供了一种具有用于RFID芯片的天线的印刷电路板和用于制造印刷电路板的方法。 该方法包括提供布置有金属箔层的印刷电路板的步骤; 图案化金属箔层以形成包括第一天线分支和第二天线分支的天线，其中第一天线分支具有至少两个直角匝; 以及将RFID芯片安装在所述金属箔层上以便电连接到所述第一天线分支和所述第二天线分支，其中在所述第一天线分支的直角匝之间形成通孔，使得所述第一天线 分支通过通孔电连接到印刷电路板的内部或背面的金属导体。

公开(公告)号：US20110226518A1

公开(公告)日：2011-09-22

申请号：US13130675

申请日：2009-11-24

Applicant: Risato Ohhira

Inventor： Risato Ohhira

IPC: H05K1/11 ,  H05K3/02

CPC classification number: H05K1/0243 ,  H01P3/003 ,  H01P5/107 ,  H05K1/0219 ,  H05K2201/0919 ,  H05K2201/09318 ,  H05K2201/09809 ,  H05K2201/10189 ,  H05K2201/10446 ,  Y10T29/49156

Abstract: A coplanar line formed on a high-frequency substrate of a high-frequency module includes a first dielectric layer, a signal line which is formed on the surface of the first dielectric layer and connected to a core line of a coaxial connector, a ground which is formed in opposite areas beside the signal line with a clearance therebetween, and a lower ground of the first dielectric layer. A second dielectric layer is laminated with the first dielectric layer so as to interpose the lower ground therebetween. Additionally, the lower ground is exposed on the terminal face of the high-frequency substrate coupled with the coaxial connector in either the first dielectric layer or the second dielectric layer and connected to an outer conductor of the coaxial connector. Thus, it is possible to prevent an insertion loss from increasing due to electromagnetic emission occurring in the clearance of the high-frequency substrate in response to transmitting signals in a high frequency range.

Abstract translation: 形成在高频模块的高频基板上的共平面线包括第一电介质层，形成在第一电介质层的表面上并连接到同轴连接器的芯线的信号线， 形成在信号线旁边的相对区域中，其间具有间隙，以及第一介电层的下部接地。 第二电介质层与第一电介质层层叠以便在其间插入较低的接地。 此外，下部接地暴露在与第一电介质层或第二电介质层中的同轴连接器耦合的高频衬底的端子面上，并连接到同轴连接器的外部导体。 因此，可以防止由于高频基板的间隙中发生的电磁辐射响应于高频范围内的发送信号而增加插入损耗。

公开(公告)号：US08017873B2

公开(公告)日：2011-09-13

申请号：US12167242

申请日：2008-07-02

Applicant: Chia-Hui Wu

Inventor： Chia-Hui Wu

IPC: H05K1/00 ,  H05K1/03 ,  H05K1/14

CPC classification number: H01L23/4985 ,  H01L24/16 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/14 ,  H05K1/0209 ,  H05K1/095 ,  H05K1/189 ,  H05K2201/09318 ,  H05K2201/10674 ,  H05K2203/104 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49169

Abstract: A chip on film (COF) structure includes a flexible circuit board and a chip. The flexible circuit board includes a flexible base film and a conductive layer. The flexible base film has a polyimide layer and an anisotropic conductive layer (ACL). The conductive layer is disposed on the flexible base film. The conductive layer and the ACL are separated by the polyimide layer. The chip is mounted with the conductive layer via interconnectors.

Abstract translation: 膜芯片（COF）结构包括柔性电路板和芯片。 柔性电路板包括柔性基膜和导电层。 柔性基膜具有聚酰亚胺层和各向异性导电层（ACL）。 导电层设置在柔性基膜上。 导电层和ACL被聚酰亚胺层分离。 芯片通过互连器件安装有导电层。

公开(公告)号：US20110024160A1

公开(公告)日：2011-02-03

申请号：US12534077

申请日：2009-07-31

Applicant: Clifton Quan ,  Hee Kyung Kim ,  Fangchou Yang ,  Kevin C. Rolston ,  Edward Marsh Jackson

Inventor： Clifton Quan ,  Hee Kyung Kim ,  Fangchou Yang ,  Kevin C. Rolston ,  Edward Marsh Jackson

IPC: H05K1/00 ,  H05K3/36

CPC classification number: H05K1/028 ,  H05K1/024 ,  H05K1/144 ,  H05K1/147 ,  H05K3/361 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4635 ,  H05K2201/055 ,  H05K2201/058 ,  H05K2201/09109 ,  H05K2201/09318 ,  H05K2201/10378 ,  H05K2203/063 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: A multi-layer microwave corrugated printed circuit board is provided. In one embodiment, the invention relates to a method for interconnecting components of a corrugated printed circuit board, the components including a first flexible layer having a first signal line on a surface of the first flexible layer and a second flexible layer having a second signal line on a surface of the second flexible layer, the method including forming at least one first hole in the first flexible layer, forming a conductive pad on the second flexible layer, forming at least one second hole in a non-conductive adhesive layer, aligning the at least one second hole with the at least one first hole and the conductive pad, bonding the first flexible layer and the second flexible layer, with the non-conductive adhesive layer disposed there between, and filling the at least one first hole and the at least one second hole with a conductive paste to electrically couple the first signal line with the second signal line.

Abstract translation: 提供多层微波波纹印刷电路板。 在一个实施例中，本发明涉及一种用于互连波纹印刷电路板的部件的方法，所述部件包括在第一柔性层的表面上具有第一信号线的第一柔性层和具有第二信号线的第二柔性层 在所述第二柔性层的表面上，所述方法包括在所述第一柔性层中形成至少一个第一孔，在所述第二柔性层上形成导电垫，在非导电粘合剂层中形成至少一个第二孔， 至少一个具有所述至少一个第一孔和所述导电垫的第二孔，将所述第一柔性层和所述第二柔性层结合，所述非导电粘合剂层设置在所述第一孔和所述第二柔性层之间，并填充所述至少一个第一孔和所述第二孔 至少一个具有导电膏的第二孔，用于将第一信号线与第二信号线电耦合。

公开(公告)号：US20100328920A1

公开(公告)日：2010-12-30

申请号：US12801279

申请日：2010-06-01

Applicant: Masayuki Nikaido ,  Yoshiaki Ishigami ,  Kenichi Tamura ,  Takehiko Tokoro

Inventor： Masayuki Nikaido ,  Yoshiaki Ishigami ,  Kenichi Tamura ,  Takehiko Tokoro

IPC: H05K1/11

CPC classification number: H05K1/142 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/3011 ,  H05K1/0215 ,  H05K1/0219 ,  H05K1/025 ,  H05K3/0061 ,  H05K3/403 ,  H05K3/4053 ,  H05K2201/0919 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/09354 ,  H05K2201/09845 ,  H05K2203/049 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A high-speed transmission circuit board connection structure includes a first high-speed transmission circuit board including a laminated substrate including a first signal transmission wiring formed on a surface thereof and a ground plane formed inside thereof, a second high-speed transmission circuit board including a circuit substrate and a second signal transmission wiring formed on a surface of the circuit substrate, a conductive board connecting member for fixing the first and second high-speed transmission circuit boards to a surface thereof, and a bonding wire for electrically connecting the first signal transmission wiring and the second signal transmission wiring. The ground plane is exposed on a side end face of the laminated substrate, and a conductive film is formed on the side end face such that the ground plane of the first high-speed transmission circuit board is electrically connected to the board connecting member with the conductive film.

Abstract translation: 高速传输电路板连接结构包括：第一高速传输电路板，包括：层叠基板，其包括形成在其表面上的第一信号传输布线和形成在其内部的接地平面;第二高速传输电路板，包括 电路基板和形成在电路基板的表面上的第二信号传输布线，用于将第一和第二高速传输电路板固定到其表面的导电板连接部件，以及用于将第一信号 传输线和第二信号传输线。 接地面暴露在层叠基板的侧端面上，在侧端面上形成导电膜，使得第一高速传输电路板的接地面与板连接部件电连接 导电膜。

公开(公告)号：US20100328868A1

公开(公告)日：2010-12-30

申请号：US12854252

申请日：2010-08-11

Applicant: John M. Lauffer ,  Voya R. Markovich ,  Michael Wozniak

Inventor： John M. Lauffer ,  Voya R. Markovich ,  Michael Wozniak

IPC: H05K5/00 ,  H05K1/18

CPC classification number: H01L21/4857 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K3/383 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/09318 ,  H05K2203/0353 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T428/12556 ,  Y10T428/12993 ,  H01L2224/0401

Abstract: A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided.

Abstract translation: 其中两个导电层（例如，电镀铜箔）被结合（例如层压）到电介质层的电路化衬底。 物理地结合到电介质的两个箔表面中的每一个是光滑的（例如，优选通过化学处理），并且在其上包括薄的有机层，而两个箔的外表面也是光滑的（例如，优选也使用化学处理 步）。 这些导电层中的一个可以用作接地或电压平面，而另一个可以用作具有多个单独信号线作为其一部分的信号平面。 还提供了使用这种电路化基板的电气组件和信息处理系统。

公开(公告)号：US20100307795A1

公开(公告)日：2010-12-09

申请号：US12564734

申请日：2009-09-22

Applicant: WANG-JIA CHEN ,  WEI ZHOU ,  YU-HSU LIN ,  FENG ZHANG

Inventor： WANG-JIA CHEN ,  WEI ZHOU ,  YU-HSU LIN ,  FENG ZHANG

IPC: H05K1/00

CPC classification number: H05K1/025 ,  H05K1/0245 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/09345 ,  H05K2201/09727

Abstract: A circuit board includes an insulation layer, a signal layer disposed on one side of the insulation layer, and a ground plane and a power plane disposed on the insulation layer at a side opposite to the signal layer. The insulation layer forms a separating area arranged between the ground plane and the power plane. At least two signal traces parallel to each other are arranged on the signal layer at one side corresponding to one of the ground plane and the power plane. A width of the signal trace close to the separating area is wider than that of the signal trace away from the separating area.

Abstract translation: 电路板包括绝缘层，设置在绝缘层的一侧的信号层，以及设置在与信号层相对的一侧的绝缘层上的接地面和电源面。 绝缘层形成布置在接地平面和电源平面之间的分离区域。 彼此平行的至少两条信号迹线在对应于接地平面和电源平面之一的一侧上布置在信号层上。 靠近分离区域的信号迹线的宽度比远离分离区域的信号迹线宽。

公开(公告)号：US20100276183A1

公开(公告)日：2010-11-04

申请号：US12768258

申请日：2010-04-27

Applicant: Tadao OOKAWA ,  Mitsuru HONJO ,  Daisuke YAMAUCHI

Inventor： Tadao OOKAWA ,  Mitsuru HONJO ,  Daisuke YAMAUCHI

IPC: H05K1/02

CPC classification number: H05K1/0245 ,  H05K1/0393 ,  H05K3/28 ,  H05K2201/09236 ,  H05K2201/09318

Abstract: An FPC board includes a base insulating layer. A plurality of wiring traces are formed on the base insulating layer. The adjacent wiring traces are arranged at a distance d from each other, and each wiring trace has a predetermined width and a thickness t1. Each transmission line pair is constituted by the two adjacent wiring traces of the plurality of wring traces. A ratio of the thickness t1 of the wiring trace to the distance d between the adjacent wiring traces is set to 0.8 or more. A cover insulating layer may be formed on the base insulating layer to cover the wiring traces. A metal layer having a predetermined thickness may be provided on a back surface of the base insulating layer. Furthermore, a differential impedance of each transmission line pair may be set to 100 Ω.

Abstract translation: FPC基板包括基底绝缘层。 在基底绝缘层上形成多个布线迹线。 相邻的布线轨迹彼此间距离设置，每个布线迹线具有预定的宽度和厚度t1。 每个传输线对由多个连接迹线的两个相邻的布线迹线构成。 布线迹线的厚度t1与相邻布线之间的距离d的比率设定为0.8以上。 覆盖绝缘层可以形成在基底绝缘层上以覆盖布线迹线。 可以在基底绝缘层的背面上设置具有预定厚度的金属层。 此外，每个传输线对的差分阻抗可以被设置为100＆OHgr。