公开(公告)号：US20130042040A1

公开(公告)日：2013-02-14

申请号：US13274344

申请日：2011-10-16

Applicant: ZHENG-HENG SUN

Inventor： ZHENG-HENG SUN

IPC: G06F13/00

CPC classification number: H05K1/029 ,  H05K1/141 ,  H05K2201/09954 ,  H05K2201/10045 ,  H05K2201/10189

Abstract: A connector assembly includes first to fifth connectors, two PCIe slots, and an adapter board. When the first connector is connected to the fifth connector, and the third connector is connected to the fourth connector, signals at the pins of the third connector are transmitted to the second group of pins of the first PCIe slot through the fourth connector, the fifth connector, and the first connector in series. When the second connector is connected to the fifth connector, and the third connector is connected to the fourth connector, signals at pins of the third connector are transmitted to the fourth group of pins of the second PCIe slot through the fourth connector, the fifth connector, and the second connector in series.

Abstract translation: 连接器组件包括第一至第五连接器，两个PCIe插槽和适配器板。 当第一连接器连接到第五连接器，并且第三连接器连接到第四连接器时，第三连接器的引脚处的信号通过第四连接器传送到第一PCIe插槽的第二组引脚，第五连接器 连接器和串联的第一连接器。 当第二连接器连接到第五连接器，并且第三连接器连接到第四连接器时，通过第四连接器将第三连接器的引脚处的信号传输到第二PCIe插槽的第四组引脚，第五连接器 ，第二连接器串联。

公开(公告)号：US20120327623A1

公开(公告)日：2012-12-27

申请号：US13596066

申请日：2012-08-28

Applicant: YUNG-CHIEH CHEN ,  CHENG-HSIEN LI ,  SHOU-KUO HSU

Inventor： YUNG-CHIEH CHEN ,  CHENG-HSIEN LI ,  SHOU-KUO HSU

IPC: H01R4/00 ,  H05K3/32

CPC classification number: H05K1/0295 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/0243 ,  H05K1/113 ,  H05K2201/09236 ,  H05K2201/09954 ,  H05K2201/10545 ,  H05K2201/10636 ,  H05K2201/10689 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/4913

Abstract: A printed circuit board includes first and second layout layers, first and second components, and a pair of connecting portions. The first layout layer includes a pair of first conducting portions connected to a control chip. The second layout layer includes pairs of second to fourth conducting portions. The connecting portions connect the first and third conducting portions together. When an electronic device is connected to the second conducting portions, and the first and second components are connected to the third and fourth conducting portions to form a first route, signals generated by the control chip are transmitted to the electronic device through the first route. When the electronic device is connected to the fourth conducting portions, and the first and second components are connected to the second and third conducting portions to form a second route, the signals are transmitted to the electronic device through the second route.

Abstract translation: 印刷电路板包括第一和第二布局层，第一和第二部件以及一对连接部分。 第一布局层包括连接到控制芯片的一对第一导电部分。 第二布局层包括成对的第二至第四导电部分。 连接部分将第一和第三导电部分连接在一起。 当电子设备连接到第二导电部分，并且第一和第二部件连接到第三和第四导电部分以形成第一路由时，由控制芯片产生的信号通过第一路径传输到电子设备。 当电子设备连接到第四导电部分，并且第一和第二部件连接到第二和第三导电部分以形成第二路线时，信号通过第二路径传输到电子设备。

公开(公告)号：US08319114B2

公开(公告)日：2012-11-27

申请号：US12061453

申请日：2008-04-02

Applicant: Sun-Wen Cyrus Cheng ,  Paulette Lemond ,  Carl Milton Wildrick

Inventor： Sun-Wen Cyrus Cheng ,  Paulette Lemond ,  Carl Milton Wildrick

IPC: H05K1/16

CPC classification number: H05K3/3442 ,  H05K1/141 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09663 ,  H05K2201/099 ,  H05K2201/09954 ,  Y02P70/613

Abstract: A dual footprint mounting package for a surface mount power converter modules and its method of manufacture. Castellated regions are formed on the edge of the component package using the appropriate sized drill or milling bit. Edge plating is applied to the castellated surfaces to create edge pads. The edge plating provides electrical continuity between the edge pads and the SMT pads. Solder mask, or other materials, is applied to prevent solder from wicking between each SMT pad and its respective edge pad. Such component may be attached to a larger device PWB using either the edge pads or the SMT pads, or may even be attached using a combination of the two, such as in the event of a pad failure or other defect.

Abstract translation: 一种用于表面贴装功率转换器模块及其制造方法的双重封装安装封装。 使用适当尺寸的钻头或铣削钻头在组件封装的边缘上形成铸造区域。 将边缘电镀施加到cast形表面以形成边缘焊盘。 边缘电镀提供边缘焊盘和SMT焊盘之间的电气连续性。 施加焊接掩模或其他材料以防止焊料在每个SMT焊盘和其相应的边缘焊盘之间芯吸。 这样的组件可以使用边缘焊盘或SMT焊盘连接到更大的设备PWB，或者甚至可以使用两者的组合来连接，例如在焊盘故障或其他缺陷的情况下。

公开(公告)号：US08264851B2

公开(公告)日：2012-09-11

申请号：US12005895

申请日：2007-12-28

Applicant: Behdad Jafari ,  George Sorensen

Inventor： Behdad Jafari ,  George Sorensen

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H05K1/141 ,  G06F1/183 ,  H01L25/18 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/15321 ,  H05K1/0204 ,  H05K1/0206 ,  H05K3/3436 ,  H05K2201/09954 ,  H05K2201/10159 ,  H05K2201/10674 ,  H05K2203/1572

Abstract: A Multi-configuration Processor-Memory device for coupling to a PCB (printed circuit board) interface. The device comprises a substrate that supports multiple configurations of memory components and a processor while having a single, common interface with a PCB interface of a printed circuit board. In a first configuration, the substrate supports a processor and a first number of memory components. In a second configuration, the substrate supports a processor and an additional number of memory components. The memory components can be pre-tested, packaged memory components mounted on the substrate. The processor can be a surface mounted processor die. Additionally, the processor can be mounted in a flip chip configuration, side-opposite the memory components. In the first configuration, a heat spreader can be mounted on the memory components and the processor to dissipate heat. In the second, flip chip, configuration, the processor face can be soldered onto a non-functional area of the PCB interface of the printed circuit board to dissipate heat.

Abstract translation: 用于耦合到PCB（印刷电路板）接口的多配置处理器 - 存储器件。 该设备包括支持多个配置的存储器组件的基板和处理器，同时具有与印刷电路板的PCB接口的单一公共接口。 在第一配置中，衬底支撑处理器和第一数量的存储器组件。 在第二配置中，衬底支持处理器和附加数量的存储器组件。 存储器组件可以预先测试，安装在基板上的封装存储器组件。 处理器可以是表面安装的处理器管芯。 此外，处理器可以安装在倒装芯片配置中，与存储器组件相对。 在第一配置中，散热器可以安装在存储器组件和处理器上以散热。 在第二个倒装芯片的配置中，处理器面可以被焊接到印刷电路板的PCB接口的非功能区域以散热。

公开(公告)号：US08238112B2

公开(公告)日：2012-08-07

申请号：US12457803

申请日：2009-06-22

Applicant: Yu-Sik Kim ,  Woo-Sung Han

Inventor： Yu-Sik Kim ,  Woo-Sung Han

IPC: H05K1/18

CPC classification number: H05K1/0295 ,  H01L25/0753 ,  H01L2224/16225 ,  H05K2201/09227 ,  H05K2201/09254 ,  H05K2201/09318 ,  H05K2201/0949 ,  H05K2201/09663 ,  H05K2201/09954 ,  H05K2201/10106 ,  H05K2203/173

Abstract: A sub-mount adapted for AC and DC operation of devices mountable thereon, light emitting devices including such a sub-mount, and methods of manufacturing such a sub-mount are provided. The sub-mount including a base substrate including a first surface and a second surface different from the first surface, a conductive pattern on the first surface, a first pair and a second pair of first and second electrodes on the second surface, and vias extending through the base substrate between the first and second surfaces, wherein the conductive pattern includes a first set of mounting portions and two via portions along a first electrical path between the first pair of first and second electrodes, and a second set of mounting portions and two via portions along a second electrical path between the second pair of first and second electrodes, the via portions connecting respective portions of the conductive pattern to respective electrodes of the first and second pair of first and second electrodes through the vias.

Abstract translation: 提供一种适用于可安装在其上的设备的AC和DC操作的子座，包括这种子座的发光设备以及制造这种子座的方法。 所述子安装件包括基底，所述基底包括第一表面和与所述第一表面不同的第二表面，所述第一表面上的导电图案，所述第二表面上的第一对和第二对第一和第二电极，以及通孔延伸 通过第一和第二表面之间的基底衬底，其中导电图案包括第一组安装部分和沿着第一对第一和第二电极之间的第一电路径的两个通孔部分，以及第二组安装部分和两个 通过部分沿着第二对第一和第二电极之间的第二电路径，通孔部分将导电图案的相应部分连接到通过通孔的第一和第二对第一和第二对电极的相应电极。

公开(公告)号：US20120014080A1

公开(公告)日：2012-01-19

申请号：US13041442

申请日：2011-03-07

Applicant: Huai-Yuan Feng ,  Ching-Gu Pan ,  Yan-Bin Luo ,  Hua Wu ,  Shang-Yi Lin

Inventor： Huai-Yuan Feng ,  Ching-Gu Pan ,  Yan-Bin Luo ,  Hua Wu ,  Shang-Yi Lin

IPC: H05K1/14 ,  H05K1/11

CPC classification number: G06F17/5072 ,  H05K1/029 ,  H05K1/0295 ,  H05K2201/09954 ,  H05K2201/10189 ,  H05K2201/10689

Abstract: An electronic device includes an integrated circuit, a connector, and a circuit board. The integrated circuit includes a first signal processing circuit, a second signal processing circuit, and an interface multiplexer having a first input port electrically connected to the first signal processing circuit, a second input port electrically connected to the second signal processing circuit, and an output port arranged to be electrically connected to the first input port or the second input port. The circuit board carries the integrated circuit and has a plurality of connector placement sites, including at least a first connector placement site each dedicated to the first signal processing circuit and at least a second connector placement site each dedicated to the second signal processing circuit. The connector placement sites and the output port of the interface multiplexer are electrically connected in series. The connector is installed on one of the connector placement sites.

Abstract translation: 电子设备包括集成电路，连接器和电路板。 集成电路包括第一信号处理电路，第二信号处理电路和接口多路复用器，其具有电连接到第一信号处理电路的第一输入端口，电连接到第二信号处理电路的第二输入端口和输出端 端口被布置成电连接到第一输入端口或第二输入端口。 电路板承载集成电路并且具有多个连接器放置位置，包括至少第一连接器放置位置，每个专用于第一信号处理电路和至少第二连接器放置位置，每个专用于第二信号处理电路。 接口多路复用器的连接器放置位置和输出端口串联电连接。 连接器安装在其中一个连接器放置位置上。

公开(公告)号：US08047853B2

公开(公告)日：2011-11-01

申请号：US12399608

申请日：2009-03-06

Applicant: David S. Slaton

Inventor： David S. Slaton

IPC: H01R12/00

CPC classification number: H05K1/0295 ,  H01R12/724 ,  H05K1/182 ,  H05K7/1461 ,  H05K2201/09954 ,  H05K2201/10189 ,  H05K2201/10446 ,  H05K2201/10522

Abstract: A printed circuit board including a P1 connector, a P2 connector, and a first common connector configured to connect an application-specific connector to the printed circuit board.

Abstract translation: 一种印刷电路板，包括P1连接器，P2连接器和被配置为将专用连接器连接到印刷电路板的第一公共连接器。

公开(公告)号：US07888695B2

公开(公告)日：2011-02-15

申请号：US11892832

申请日：2007-08-28

Applicant: Yu-Chuan Lin ,  Shau-Yu Tsai

Inventor： Yu-Chuan Lin ,  Shau-Yu Tsai

IPC: H01L21/44

CPC classification number: H05K1/117 ,  H05K1/029 ,  H05K1/0295 ,  H05K2201/09954 ,  H05K2201/10106 ,  H05K2201/10189 ,  H05K2203/173 ,  Y10T29/49117

Abstract: A manufacture method of a light emitting device is provided. Firstly, at least one circuit board is provided. A plurality of light emitting packages, a first undetermined power input end and a second undetermined power input end are disposed at the circuit board. The light emitting packages are electrically connected to the first undetermined power input end and the second undetermined power input end. Each of the first undetermined power input end and the second undetermined power input end has at least two first pads. The first pads of each of the first undetermined power input end and the second undetermined power input end are electrically isolated from each other. Next, the first undetermined power input end is selected to be a power input region for inputting an external power signal. Then, the first pads of the second undetermined power input end are electrically connected to each other.

Abstract translation: 提供了一种发光器件的制造方法。 首先，提供至少一个电路板。 多个发光封装，第一未确定电源输入端和第二未确定电源输入端设置在电路板上。 发光封装电连接到第一未确定电源输入端和第二未确定电源输入端。 第一未确定功率输入端和第二未确定功率输入端中的每一个具有至少两个第一焊盘。 第一未确定电源输入端和第二未确定电源输入端中的每一个的第一焊盘彼此电隔离。 接下来，将第一未确定电力输入端选择为用于输入外部电力信号的电力输入区域。 然后，第二未确定电源输入端的第一焊盘彼此电连接。

公开(公告)号：US07868334B2

公开(公告)日：2011-01-11

申请号：US12080966

申请日：2008-04-08

Applicant: Yasunori Hata ,  Masahiko Kobayakawa

Inventor： Yasunori Hata ,  Masahiko Kobayakawa

IPC: H01L27/15

CPC classification number: H05K3/3426 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48247 ,  H05K2201/09954 ,  H05K2201/10106 ,  Y02P70/613 ,  H01L2924/00014

Abstract: A semiconductor light emitting device includes a semiconductor light emitting element, a lead electrically connected to the semiconductor light emitting element, and a resin package covering the semiconductor light emitting element and part of the lead. The resin package includes a lens facing the semiconductor light emitting element. The lead includes an exposed portion that is not covered by the resin package. The exposed portion includes a first portion and a second portion, where the first portion has a first mount surface oriented backward along the optical axis of the lens, and the second portion has a second mount surface oriented perpendicularly to the optical axis of the lens.

Abstract translation: 半导体发光器件包括半导体发光元件，与半导体发光元件电连接的引线以及覆盖半导体发光元件和引线的一部分的树脂封装。 树脂封装包括面向半导体发光元件的透镜。 引线包括未被树脂封装覆盖的暴露部分。 暴露部分包括第一部分和第二部分，其中第一部分具有沿着透镜的光轴向后定向的第一安装表面，并且第二部分具有垂直于透镜的光轴定向的第二安装表面。

公开(公告)号：US07795624B2

公开(公告)日：2010-09-14

申请号：US11976849

申请日：2007-10-29

Applicant: Kensho Sakano

Inventor： Kensho Sakano

IPC: H01L21/66 ,  H05K11/14

CPC classification number: H01L33/62 ,  H01L23/49805 ,  H01L24/45 ,  H01L33/486 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45169 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01021 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01063 ,  H01L2924/01066 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/284 ,  H05K3/3442 ,  H05K2201/09181 ,  H05K2201/09954 ,  H05K2201/10106 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device comprises a semiconductor element and a support body made of a stack of ceramic layers having a recess in which electrical conductors are electrically connected with the semiconductor element, wherein at least a part of a top face of a recess side wall is covered by a resin, thereby providing a light emitting device.

Abstract translation: 半导体器件包括半导体元件和由堆叠的陶瓷层制成的支撑体，其具有凹部，电导体与半导体元件电连接，其中凹部侧壁的顶面的至少一部分被覆盖 树脂，从而提供发光器件。