Abstract:
A method of forming electrically conductive paths within grooves formed in a substrate wherein the width of the grooves is of the same order of magnitude as the thickness of an electrically conductive layer deposited on the substrate and in the grooves. The substrate with grooves therein is exposed to a medium whereby electrically conductive material from the medium deposits substantially uniformly on all surfaces of the substrate which are exposed to the medium. In this way, the build-up of conductive material in grooves will take place along the side walls as well as the bottom of the grooves. If the layer is of substantially the same order of magnitude as the width of the groove (about one half the groove width or greater), the grooves will fill up with conductive material. The remainder of the substrate will ultimately provide a substantially flat conductive layer on the substrate surface. The conductive material is then removed by an action which removes exposed conductor along the entire substrate surface at a uniform rate whereby the conductor will be substantially entirely removed from the substrate except for the portion thereof within the grooves. In this way an electrically conductive path of predetermined geometry is provided.
Abstract:
The present invention is directed to a method of preparing a substrate to improve the adherence of a metallic coating to the substrate and the product thereof. More particularly, a method of manufactiring a molded circuit board and unique circuit board produced thereby, is disclosed. A molding compound, such as an epoxy resin is blended with a plating additive, such as calcium carbonate that is relatively inert to the molding compound. The blended mix can then be molded into a desired shape which, for a printed circuit board, can be a relatively flat plate configuration with a recessed groove and hole formation pattern. The high relief areas of the circuit board can be masked with a protective material. The plating additive can then be chemically etched from the grooved recessed area and holes, for example, by a hydrochloric acid bath. Appropriate catalyst and accelerators can be applied to the recessed groove pattern before the protective mask material is removed. In one embodiment, an electroless plating nickel material can be deposited to permit it to penetrate the interstices or cavity pattern, left in the recessed groove and hole pattern by the etching of the plating additive. Copper can then be applied to the nickel pattern in the recessed grooves, for example, by dipping the substrate in an electroless plating copper solution. The substrate is heated to cure the epoxy resin for mechanically locking the metallic coating in the interstices, or cavities, left by the etching of the plating additive.
Abstract:
A method and apparatus is disclosed for bonding of dielectric circuit boa for microwave use, the bonding together of several circuit boards to form subassemblies and the bonding of subassemblies together. The finished circuit may include a bonded-in ground plate of copper wire cloth or the like and may include through-plate holes. The technique includes the build-up of thin films to provide strength, toughness and dimensional accuracy. Orthogonal positioning of directional stresses and cooling under pressure have a stabilizing effect. The bonding of copper or other conductive sheet or foil to the substrate is done without the use of a copper oxide or other coating and using only heat and pressure. An etched circuit in the copper sheet or foil, for example, is made flush with the finished surface of the board in the process. A normal bonding cycle comprises (1) loading the parts to be bonded in a confining mold, (2) placing a conforming mold plate within the mold and closing the parts in a press, (3) pressing for a predetermined time at a predetermined elevated temperature and (4) shock cooling the material before removing pressure from the mold.
Abstract:
A process for making a circuit board modifies a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and resin-rich surface removal operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist.
Abstract:
The present specification relates to a manufacturing method of a circuit board. More particularly, the present specification relates to a circuit board and a manufacturing method of an electronic device including the same.
Abstract:
A package substrate and a semiconductor package are provided. The package substrate includes an insulating layer having opposing first and second surfaces; a first wiring layer formed in the insulating layer, exposed from the first surface of the insulating layer, and having a plurality of first conductive pads; a second wiring layer formed in the insulating layer, exposed from the second surface, and having a plurality of second conductive pads; a third wiring layer formed on the first surface and electrically connected with the first wiring layer; a plurality of first metal bumps formed on the first conductive pads corresponding; and at least one conductive via vertically embedded in the insulating layer and electrically connected to the second and third wiring layers. Therefore, the surfaces of first conductive pads are reduced, and the non-wetting between the first conductive pads and the solder materials formed on conductive bumps is avoided.