公开(公告)号：US20060000640A1

公开(公告)日：2006-01-05

申请号：US11209790

申请日：2005-08-24

Applicant: Takashi Fushie ,  Takeshi Kagatsume ,  Shigekazu Matsui

Inventor： Takashi Fushie ,  Takeshi Kagatsume ,  Shigekazu Matsui

IPC: H01R12/04 ,  H01K3/10

CPC classification number: H05K3/426 ,  H01L23/5384 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4605 ,  H05K3/467 ,  H05K2201/0154 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/068 ,  H05K2201/09536 ,  H05K2201/0959 ,  Y10T29/49165 ,  Y10T428/24926 ,  H01L2924/00

Abstract: A multilayer printed wiring board which permits the formation of fine wiring patterns, thereby increasing the density of wiring patterns. Using photosensitive glass having a coefficient of thermal expansion close to that of a copper film as a core substrate, a through hole is formed in the photosensitive glass by photolithography, a sputtering silicon oxide layer and a sputtering silicon nitride layer are formed to prevent leak of alkali metal ions from the photosensitive glass, a sputtering chromium layer, a sputtering chromium-copper layer and a sputtering copper layer are formed to enhance the adhesion strength between the copper film and the sputtering silicon oxide layer, and a copper film of 1 to 20 μm thick is formed. With resin filled into the interior of the through hole, a wiring layer is patterned by etching, an insulating layer is formed, and the surface is covered with a surface treatment layer and a cover coat.

公开(公告)号：US06968613B2

公开(公告)日：2005-11-29

申请号：US10176122

申请日：2002-06-20

Applicant: Chung-Che Tsai ,  Jin-Chuan Bai

Inventor： Chung-Che Tsai ,  Jin-Chuan Bai

IPC: H05K3/28 ,  H01K3/10

CPC classification number: H05K3/28 ,  H05K2201/0959 ,  H05K2203/0582 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49171

Abstract: A fabrication method of a circuit board is proposed, wherein a core layer is formed with a plurality of conductive traces, and photo resist is respectively applied on terminals of the conductive traces. Then, a non-solderable material is applied over the core layer as to cover the conductive traces except for the insulating material, and the non-solderable material is adapted to be surface-flush with the insulating material, allowing the insulating material to be exposed from the non-solderable material. Finally, the insulating material is removed from the core layer to expose the terminals of the conductive traces, wherein the exposed terminals are used as bond pads or bond fingers where solder balls, solder bumps or bonding wires can be bonded. This circuit board is cost-effectively fabricated by simplified processes, and beneficial in precisely exposing bond pads or bond fingers, thereby significantly improving yield of fabricated circuit boards.

Abstract translation: 提出了一种电路板的制造方法，其中芯层形成有多个导电迹线，并且将光致抗蚀剂分别施加在导电迹线的端子上。 然后，在芯层上施加不可焊接的材料以覆盖导电迹线，绝缘材料除外，并且不可焊接材料适于与绝缘材料表面齐平，从而使绝缘材料暴露 来自不可焊接材料。 最后，从芯层去除绝缘材料以露出导电迹线的端子，其中暴露的端子用作可焊接焊球，焊料凸块或接合线的接合焊盘或接合指状物。 该电路板通过简化的工艺成本有效地制造，并且有益于精确地暴露接合焊盘或接合指，从而显着提高制造的电路板的产量。

公开(公告)号：US20050189136A1

公开(公告)日：2005-09-01

申请号：US11106642

申请日：2005-04-15

Applicant: Yogo Kawasaki ,  Hiroaki Satake ,  Yutaka Iwata ,  Tetsuya Tanabe

Inventor： Yogo Kawasaki ,  Hiroaki Satake ,  Yutaka Iwata ,  Tetsuya Tanabe

IPC: H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/34 ,  H05K3/38 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/113 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/3457 ,  H05K3/381 ,  H05K3/382 ,  H05K3/426 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0209 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0796 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.

Abstract translation: 通孔36形成为穿透芯基板30和下层层间树脂绝缘层50，并且通孔66分别形成在通孔36上。 由此，通孔36和通路孔66线性配置，能够缩短布线长度，加速信号传输速度。 此外，由于分别连接到焊料凸块76（导电连接销78）的通孔36和通孔66彼此直接连接，所以确保了良好的连接可靠性。

公开(公告)号：US06933448B2

公开(公告)日：2005-08-23

申请号：US10758426

申请日：2004-01-16

Applicant: Chong-Ren Maa ,  Wan-Kuo Chih ,  Ming-Sung Tsai

Inventor： Chong-Ren Maa ,  Wan-Kuo Chih ,  Ming-Sung Tsai

IPC: H01L23/498 ,  H05K3/00 ,  H05K3/28 ,  H05K1/03

CPC classification number: H01L23/49894 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85424 ,  H01L2224/8547 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/0041 ,  H05K3/0094 ,  H05K3/28 ,  H05K2201/0191 ,  H05K2201/0959 ,  H05K2203/0152 ,  H05K2203/0376 ,  H05K2203/0554 ,  H05K2203/066 ,  H05K2203/1152 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A printed circuit board having a permanent solder mask includes a substrate made of a glassfiber reinforced epoxy resin material. The top and bottom surfaces of the substrate are disposed thereon a conductive pattern respectively. An epoxy resin solder mask is coated on each surface of the substrate in such a way that the conductive pattern is divided into a sheltered portion covered by the solder mask and an unsheltered portion exposed outside. The solder mask also has an even and smooth outer surface with a micro-roughness ranging between 0.5 μm˜10 μm and an optimum thickness ranging between 2 μm˜200 μm.

Abstract translation: 具有永久性焊接掩模的印刷电路板包括由玻璃纤维增​​强环氧树脂材料制成的基板。 基板的顶表面和底表面分别设置有导电图案。 将环氧树脂焊料掩模以这样的方式涂覆在基板的每个表面上，使得导电图案被分成由焊接掩模覆盖的遮蔽部分和暴露在外部的未被覆盖的部分。 焊接掩模还具有均匀光滑的外表面，其微观粗糙度在0.5μm〜10μm之间，最佳厚度在2μm〜200μm之间。

公开(公告)号：US20050126818A1

公开(公告)日：2005-06-16

申请号：US11012326

申请日：2004-12-16

Applicant: Toshifumi Kojima ,  Makoto Wakazono

Inventor： Toshifumi Kojima ,  Makoto Wakazono

IPC: H05K3/46 ,  H05K1/03 ,  H05K1/11

CPC classification number: H05K3/4602 ,  H05K2201/0209 ,  H05K2201/0347 ,  H05K2201/068 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096

Abstract: A multilayer wiring board (11) is provided which includes a core substrate (12) including a plurality of through-holes (15). The through-holes (15) include through-hole conductors (17) on the inner walls of corresponding penetration holes (16) of a diameter of 200 μm or less. Interlayer insulating layers (31, 32) are disposed on opposite sides of the principal planes (13, 14) of the core substrate (12). Wiring layers (23, 24) are disposed on the surface of interlayer insulating layers (31, 32). The through-holes (15) are filled with a hardened filling material (18). Lid conductors (21, 22) close the openings of the through-holes (15). The value of linear expansion of the hardened filling material (18) is 1.2% or less in the temperature region from room temperature to the solder reflow temperature. The board has excellent connection reliability and exhibits little or no cracking or delamination in the lid conductor closing the openings of the through-holes and in the surrounding conductor area.

Abstract translation: 提供一种多层布线板（11），其包括具有多个通孔（15）的芯基板（12）。 通孔（15）包括直径为200μm或更小的相应穿孔（16）内壁上的通孔导体（17）。 层间绝缘层（31,32）设置在芯基板（12）的主平面（13,14）的相对侧上。 接线层（23,24）设置在层间绝缘层（31,32）的表面上。 通孔（15）填充有硬化的填充材料（18）。 盖导体（21,22）封闭通孔（15）的开口。 在从室温到焊锡回流温度的温度区域中，硬化填充材料（18）的线膨胀值为1.2％以下。 该板具有良好的连接可靠性，并且在封闭导通孔和周围导体区域的开口的盖导体中几乎没有或没有破裂或分层。

公开(公告)号：US20050090040A1

公开(公告)日：2005-04-28

申请号：US10994995

申请日：2004-11-22

Applicant: Phil Geng ,  Stephen Joy

Inventor： Phil Geng ,  Stephen Joy

IPC: H05K3/42 ,  H01L23/12 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H05K3/3436 ,  H01L2224/81 ,  H05K1/113 ,  H05K3/0094 ,  H05K2201/0959 ,  H05K2201/10734 ,  H05K2203/1178 ,  Y02P70/613

Abstract: The electrical contacts, such as ball grid array (BGA) solder balls, of an integrated circuit (IC) are coupled to printed circuit board (PCB) bonding pads that include vias. According to an embodiment of an electronic assembly, the vias are formed off-center, so as to inhibit bridging between adjacent solder balls during a solder reflow operation by minimizing the effect of solder ball ballooning resulting from outgassing of a thermally expansive substance, such as a volatile organic compound (VOC) from the via channels. The bonding pads are separated into two groups, each having vias offset in a different direction, so that asymmetric surface tension forces in the molten solder during a solder reflow operation do not cause the IC to slide to one side. A substrate, an electronic assembly, an electronic system, and fabrication methods are also described.

Abstract translation: 诸如集成电路（IC）的球栅阵列（BGA）焊球的电触点耦合到包括通孔的印刷电路板（PCB）接合焊盘。 根据电子组件的实施例，过孔形成通孔，以便在焊料回流操作期间通过最小化由放热热膨胀物质引起的焊球膨胀的影响来抑制相邻焊球之间的桥接，例如 来自通道的挥发性有机化合物（VOC）。 接合焊盘被分成两组，每组具有沿不同方向偏移的通孔，使得在回流焊接操作期间熔融焊料中的不对称表面张力不会导致IC滑到一侧。 还描述了基板，电子组件，电子系统和制造方法。

公开(公告)号：US20050039948A1

公开(公告)日：2005-02-24

申请号：US10921525

申请日：2004-08-19

Applicant: Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

Inventor： Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

IPC: H01L21/48 ,  H01L23/498 ,  H05K1/03 ,  H05K3/00 ,  H05K3/10 ,  H05K3/18 ,  H05K3/38 ,  H05K3/42 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A metal layer 18 is sandwiched between insulating layers 14 and 20 so that required strength is maintained. Hence it follows that the thickness of a core substrate 30 can be reduced and, therefore, the thickness of a multi-layer printed circuit board can be reduced. Formation of non-penetrating openings 22 which reach the metal layer 18 in the insulating layers 14 and 20 is simply required. Therefore, small non-penetrating openings 22 can easily be formed by applying laser beams. Thus, through holes 36 each having a small diameter can be formed.

Abstract translation: 金属层18夹在绝缘层14和20之间，从而保持所需的强度。 因此，可以减小芯基板30的厚度，因此可以减小多层印刷电路板的厚度。 仅仅需要在绝缘层14和20中到达金属层18的非穿透开口22的形成。 因此，通过施加激光束可以容易地形成小的非穿透开口22。 因此，可以形成各自具有小直径的通孔36。

公开(公告)号：US06856008B2

公开(公告)日：2005-02-15

申请号：US10641037

申请日：2003-08-15

Applicant: Deepak K. Pai ,  Ronald R. Denny

Inventor： Deepak K. Pai ,  Ronald R. Denny

IPC: H05K1/14 ,  H01L23/12 ,  H05K3/28 ,  H05K3/34 ,  H05K3/36 ,  H05K3/46 ,  H01L23/02

CPC classification number: H05K3/462 ,  H01L2224/05548 ,  H05K3/28 ,  H05K3/3463 ,  H05K3/3484 ,  H05K3/4623 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/0949 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/043 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple high-layer-count (HLC) substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two HLC substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). An adhesive film may be positioned between the surfaces of the HLC substrates having the conductive pads, where the adhesive film includes an aperture located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The HLC substrates then may be pressed together to mechanically bond the two substrates via the adhesive. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the two conductive pads through the aperture in the adhesive film.

Abstract translation: 本发明提供了用于层叠和互连多个高层计数（HLC）衬底以形成多层封装或其它电路部件的多种技术。 可以在两个HLC衬底中的至少一个的导电焊盘上形成焊料凸块。 焊料凸块优选地由焊膏应用于导电焊盘形成。 粘合剂膜可以位于具有导电焊盘的HLC衬底的表面之间，其中粘合剂膜包括基本上位于导电焊盘上方的孔，使得导电焊盘和/或焊料凸块通过孔彼此面对。 然后可以将HLC基底压在一起以经由粘合剂机械地粘合两个基底。 在叠层期间或之后可以回流焊料凸点，以产生焊接段，该焊料段通过粘合膜中的孔提供两个导电焊盘之间的电连接。

公开(公告)号：US06840425B2

公开(公告)日：2005-01-11

申请号：US10026338

申请日：2001-12-20

Applicant: Jesse L. Pedigo

Inventor： Jesse L. Pedigo

IPC: H05K3/00 ,  H05K3/12 ,  H05K3/40 ,  B23K1/00

CPC classification number: H05K3/1233 ,  H05K3/0094 ,  H05K3/4053 ,  H05K3/4069 ,  H05K2201/0959 ,  H05K2201/10204 ,  H05K2203/0126 ,  H05K2203/0139 ,  H05K2203/0156 ,  H05K2203/0182 ,  H05K2203/0554 ,  H05K2203/1105

Abstract: A system comprising a scavenging blade, a printed wiring board receiving portion, and a movement mechanism adapted to move the scavenging blade and printed wiring board receiving portion relative to each other, and to a method of removing excess fill material comprising providing a printed wiring board having filled holes and at least some excess fill material on a surface of the printed wiring board, providing a system comprising a scavenging blade, positioning the printed wiring board in the system, and causing the scavenging blade to traverse at least a portion of the printed wiring board in a manner that causes the scavenging blade to remove at least a portion of the excess fill material from the printed wiring board.

Abstract translation: 一种包括扫气叶片，印刷线路板接收部分和适于相对于彼此移动扫气叶片和印刷线路板接收部分的移动机构的系统，以及一种去除多余填充材料的方法，包括提供印刷线路板 在印刷电路板的表面上填充孔和至少一些多余的填充材料，提供包括清扫刀片的系统，将印刷线路板定位在系统中，并且使扫气刀片穿过至少一部分印刷 布线板以使清扫刀片从印刷线路板去除多余的填充材料的至少一部分的方式。

公开(公告)号：US20040233642A1

公开(公告)日：2004-11-25

申请号：US10846871

申请日：2004-05-14

Inventor： Kazutoshi Ito ,  Takamasa Oguri ,  Akihiro Mizutani

IPC: H05K007/20

CPC classification number: H05K1/0206 ,  H01L23/3677 ,  H01L23/42 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/181 ,  H05K3/429 ,  H05K2201/09054 ,  H05K2201/0959 ,  H05K2201/10166 ,  Y10T428/31681 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/43 ,  H01L2924/00012

Abstract: A heat dissipation structure includes a heat-producing electronic component on a substrate, a thermally conductive case, and grease. The electronic component and the substrate are housed in the case. The grease is provided between the case and the electronic component or the substrate for transmitting heat produced by the electronic component to the case. The case has contact surfaces that contact with the grease. The contact surfaces have free energy equal to or higher than 20 mN/m and roughness equal to or larger than 1.0 nullm.

Abstract translation: 散热结构包括在基板上的发热电子部件，导热壳体和油脂。 电子部件和基板被容纳在壳体中。 在壳体和电子部件或基板之间设置有用于将由电子部件产生的热量传递到壳体的润滑脂。 外壳有与油脂接触的接触表面。 接触面的自由能等于或大于20mN / m，粗糙度等于或大于1.0μm。