Packaging substrate with electrostatic discharge protection
    111.
    发明授权
    Packaging substrate with electrostatic discharge protection 有权
    包装基板采用静电放电保护

    公开(公告)号:US06700077B2

    公开(公告)日:2004-03-02

    申请号:US10164356

    申请日:2002-06-06

    Abstract: The present invention relates to a packaging substrate with electrostatic discharge protection. Each of the mold gates on the substrate is electrically connected to the first copper-mesh layer on the periphery of a top side of the substrate. When static electricity is generated during the molding process, static electric charges will be conducted from the mold gate to the first copper-mesh layer. The static electric charges are collected and restricted to a capacitor formed by a first copper-mesh layer, a dielectric layer and a second copper-mesh layer, and are discharged via a metal pad and supporter. On the other hand, the static electric charge is conducted via the first copper-mesh layer, a through hole, the second copper-mesh layer, the metal pad to the supporter. Therefore, basing on capacitor effects or conductive effects, the static electricity generated during the molding process can be safely conducted away from the substrate, preventing the dies to be packaged from damage due to electrostatic discharge so as to raise the yield rate of semiconductor package products.

    Abstract translation: 本发明涉及具有静电放电保护的封装基板。 基板上的每个模具浇口与衬底顶侧周边的第一铜网层电连接。 当在成型过程中产生静电时,静电荷将从模具门到第一铜网层进行。 静电收集并限制在由第一铜网层,电介质层和第二铜网层形成的电容器上,并通过金属垫和支撑体排出。 另一方面,静电荷通过第一铜网层,通孔,第二铜网层,金属垫到支撑体进行。 因此,基于电容器效应或导电效应,可以将成型过程中产生的静电安全地从基板导出,防止由于静电放电而使芯片受到损坏,从而提高半导体封装产品的成品率 。

    Porous power and ground planes for reduced PCB delamination and better reliability
    112.
    发明授权
    Porous power and ground planes for reduced PCB delamination and better reliability 有权
    多功能电源和接地平面可降低PCB分层和更好的可靠性

    公开(公告)号:US06613413B1

    公开(公告)日:2003-09-02

    申请号:US09300762

    申请日:1999-04-26

    Abstract: Power and ground planes used in Printed Circuit Boards (PCBs) having porous, conductive materials allow liquids (e.g., water and/or other solvents) to pass through the power and ground planes, thus decreasing failures in PCBs (or PCBs used as laminate chip carriers) caused by cathodic/anodic filament growth and delamination of insulators. Porous conductive materials suitable for use in PCBs may be formed by using metal-coated organic cloths (such as polyester or liquid crystal polymers) or fabrics (such as those made from carbon/graphite or glass fibers), using metal wire mesh instead of metal sheets, using sintered metal, or making metal sheets porous by forming an array of holes in the metal sheets. Fabrics and mesh may be woven or random. If an array of holes is formed in a metal sheet, such an array may be formed with no additional processing steps than are performed using conventional PCB assembly methods.

    Abstract translation: 在具有多孔导电材料的印刷电路板(PCB)中使用的电源和接地层允许液体(例如水和/或其他溶剂)通过电源和接地层,从而减少PCB(或用作层压芯片的PCB)故障 载体)由绝缘体的阴极/阳极丝生长和分层引起。 适用于PCB的多孔导电材料可以通过使用金属涂布的有机布(例如聚酯或液晶聚合物)或织物(例如由碳/石墨或玻璃纤维制成的那些)形成,使用金属丝网代替金属 使用烧结金属,或者通过在金属板中形成孔阵列来制造多孔的金属片。 织物和网可以编织或随机。 如果在金属板中形成孔阵列,则可以形成这样的阵列,而不需要使用常规PCB组装方法执行的附加处理步骤。

    Circuit substrate connecting structure, liquid crystal display device having the connecting structure and mounting method of liquid crystal display device
    115.
    发明申请
    Circuit substrate connecting structure, liquid crystal display device having the connecting structure and mounting method of liquid crystal display device 有权
    电路基板连接结构,具有连接结构的液晶显示装置和液晶显示装置的安装方法

    公开(公告)号:US20030063452A1

    公开(公告)日:2003-04-03

    申请号:US10259543

    申请日:2002-09-27

    Abstract: In connecting a connecting substrate 4 to a flexible substrate 5 connected to a terminal portion of one of substrates constituting a liquid crystal display panel through an anisotropic conductive film (ACF) 20, a bonding assist member 17 formed of the same material as that of an internal wiring or a connecting terminal of the connecting substrate and having substantially the same height as that of the connecting terminal is provided between adjacent terminal groups each including a plurality of connecting terminals 4b in a terminal forming region of a non-coating portion 14 in the vicinity of the connecting substrate 4, to absorb a difference in height between the terminal groups and the non-coating portion by the bonding assist member 17 to thereby make the ACF in an intimate contact with the terminal groups as well as the exposed regions uniformly throughout thereof during a temporary press-bonding step of the ACF and prevent a peeling-off and/or breakage of the ACF between the terminal groups and improve the reliability of electrical connection.

    Abstract translation: 在将连接基板4连接到通过各向异性导电膜(ACF)20连接到构成液晶显示面板的基板的端子部分的柔性基板5之间的接合辅助构件17由与 在相邻的端子组之间设置连接基板的内部布线或连接端子,并且具有与连接端子基本相同的高度,每个连接端子包括多个连接端子4b,该连接端子4b位于非涂覆部分14的端子形成区域中 连接基板4的附近,以通过接合辅助构件17吸收端子组和非涂覆部分之间的高度差,从而使ACF与端子组以及暴露区域均匀地均匀地紧密接触 在ACF的临时压接步骤期间,防止ACF在端子之间的剥离和/或断裂 提高电气连接的可靠性。

    Flexible conductive sheet
    116.
    发明申请
    Flexible conductive sheet 审中-公开
    柔性导电片

    公开(公告)号:US20020179320A1

    公开(公告)日:2002-12-05

    申请号:US09872882

    申请日:2001-06-01

    Abstract: A flexible conductive sheet is disclosed. In an exemplary embodiment of the invention, the flexible sheet includes a polyimide base layer and a metallic layer formed in a grid pattern upon the base layer. Preferably, there are a plurality of metallic layers, formed upon the base layer, with at least one of the plurality of metallic layers formed in the grid pattern. The metallic layers further include an adhesion layer, the adhesion layer further comprising a chromium layer, applied upon the polyimide base layer, and a copper layer, formed upon the chromium layer. Finally, a nickel layer is formed upon the adhesion layer, and a gold layer is formed upon the nickel layer.

    Abstract translation: 公开了柔性导电片。 在本发明的示例性实施例中,柔性片包括聚酰亚胺基底层和在基底层上形成为网格图案的金属层。 优选地,在基底层上形成有多个金属层,多个金属层中的至少一个形成为网格图案。 金属层还包括粘合层,粘合层还包括施加在聚酰亚胺基底层上的铬层和形成在铬层上的铜层。 最后,在粘合层上形成镍层,在镍层上形成金层。

    Method of making higher impedance traces on a low impedance circuit board
    117.
    发明授权
    Method of making higher impedance traces on a low impedance circuit board 失效
    在低阻抗电路板上制作更高阻抗迹线的方法

    公开(公告)号:US06433286B1

    公开(公告)日:2002-08-13

    申请号:US09677128

    申请日:2000-09-29

    Abstract: The present invention is a circuit board having a plurality of voids in a conductive reference plane to increase the characteristic impedance of a signal trace. The circuit board of the present invention comprises a conductive reference plane having a plurality of voids formed therein, and a signal trace formed over the conductive reference plane.

    Abstract translation: 本发明是在导电参考平面中具有多个空隙以增加信号迹线的特性阻抗的电路板。 本发明的电路板包括其中形成有多个空隙的导电参考平面和形成在导电参考平面上的信号迹线。

    Novel MCM -MLC technology
    118.
    发明申请
    Novel MCM -MLC technology 失效
    新型MCM -MLC技术

    公开(公告)号:US20010046125A1

    公开(公告)日:2001-11-29

    申请号:US09740280

    申请日:2000-12-19

    Abstract: Disclosed is a multilayer electronics packaging structure, especially for use in a multi chip module. By forming an overlap of signal conductors by the respective mesh conductors, an improved shielding effect is achieved and coupling between signal conductors is reduced. By increasing the via punch pitch such that multiple wiring channels are formed between adjacent vias, wirability is improved and the number of signal distribution layers may be reduced. The new structure thus shows improved electrical properties over the state-of-the-art structures, combined with a cost reduction of about 35%.

    Abstract translation: 公开了一种多层电子封装结构,特别适用于多芯片模块。 通过由相应的网状导体形成信号导体的重叠,实现了改进的屏蔽效果,并且减少了信号导线之间的耦合。 通过增加通孔冲压间距,使得在相邻通路之间形成多个布线通道,可改善布线性,并且可以减少信号分布层的数量。 因此,新结构显示出比现有技术结构更好的电性能,同时成本降低约35%。

    Circuit board having shielding planes with varied void opening patterns for controlling the impedance and the transmission time
    120.
    发明申请
    Circuit board having shielding planes with varied void opening patterns for controlling the impedance and the transmission time 有权
    具有用于控制阻抗和传输时间的具有不同空隙开口图案的屏蔽平面的电路板

    公开(公告)号:US20010010270A1

    公开(公告)日:2001-08-02

    申请号:US09777267

    申请日:2001-02-05

    Abstract: A flexible circuit board with specific shielding planes is used for low voltage differential transmission mode circuits. Both the impedance and the transmission time for the transmission line in the circuit board are controlled by shielding planes with varied void opening patterns. Capacitance and slow wave effects related to the combination of void opening patterns and the location configuration related to locations of void opening patterns are used to improve the impedance and transmission timing for the transmission line in the circuit board.

    Abstract translation: 具有特定屏蔽平面的柔性电路板用于低压差分传输模式电路。 电路板中的传输线的阻抗和传输时间均由具有不同空隙开口图案的屏蔽平面控制。 使用与空隙开口图案的组合和与空隙开口图案的位置有关的位置配置相关的电容和慢波效应来改善电路板中的传输线的阻抗和传输时序。

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