公开(公告)号：US20090120670A1

公开(公告)日：2009-05-14

申请号：US12141221

申请日：2008-06-18

Applicant: CHIN-WEN LO ,  CHIA-NING KAO

Inventor： CHIN-WEN LO ,  CHIA-NING KAO

IPC: H05K1/00

CPC classification number: H05K1/028 ,  H05K2201/055 ,  H05K2201/09236 ,  H05K2201/0969 ,  H05K2201/09727

Abstract: A bendable area design for flexible printed circuitboard is disclosed. The flexible printed circuitboard (FPC) is comprised of: a flexible substrate; at least a circuit pattern; and a bendable area, being formed intersecting with the at least one circuit pattern and having at least a groove formed therein at a position corresponding to the intersection with the at least one circuit pattern; wherein the depth of the at least one groove is no larger than the thickness of the corresponding circuit pattern for preventing the circuit pattern from being cut off by the groove. By configuring the aforesaid bendable area in the FPC, stress generated by the bending of the FPC is restricted inside the bendable area effectively so that accurate control of the bending angle for bending FPC can be realized.

Abstract translation: 公开了一种用于柔性印刷电路板的可弯曲区域设计。 柔性印刷电路板（FPC）包括：柔性基板; 至少电路图案; 以及可弯曲区域，其形成为与所述至少一个电路图案相交并且在与所述至少一个电路图案的交叉点对应的位置处形成有至少一个凹槽; 其中所述至少一个凹槽的深度不大于相应电路图案的厚度，以防止所述电路图案被所述凹槽切断。 通过在FPC中配置上述可弯曲区域，有效地限制了弯曲区域内的FPC弯曲产生的应力，从而能够精确地控制弯曲FPC的弯曲角度。

公开(公告)号：US07530816B2

公开(公告)日：2009-05-12

申请号：US11927748

申请日：2007-10-30

Applicant: Se Joon Yoo

Inventor： Se Joon Yoo

IPC: H01R12/00

CPC classification number: C25D5/02 ,  G02F1/13452 ,  H05K1/0268 ,  H05K1/117 ,  H05K3/323 ,  H05K3/3452 ,  H05K3/361 ,  H05K2201/09727 ,  Y10T29/49121

Abstract: A tap tape of a tape carrier package prevents connection parts from being eroded. The tap tape includes a base film having a device hole formed to mount a driver chip for driving a panel of a flat panel display, input patterns positioned on the base film and having a plurality of electrode pads connected to a side of the device hole, output patterns positioned on the base film and having a plurality of electrode pads connected to the other side of the device hole; and connection parts positioned at the ends of the input patterns or the output patterns and having electrode pads of widths different from widths of the electrode pads.

公开(公告)号：US07525190B2

公开(公告)日：2009-04-28

申请号：US11078342

申请日：2005-03-14

Applicant: Naohiro Hirose ,  Takashi Kariya ,  Yoji Mori

Inventor： Naohiro Hirose ,  Takashi Kariya ,  Yoji Mori

IPC: H01L23/12 ,  H05K1/00 ,  H05K7/00

CPC classification number: H01R9/09 ,  H01L23/12 ,  H01L23/48 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H05K1/0256 ,  H05K1/0263 ,  H05K1/0265 ,  H05K1/0271 ,  H05K1/113 ,  H05K1/115 ,  H05K1/116 ,  H05K3/184 ,  H05K3/241 ,  H05K3/382 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09272 ,  H05K2201/09454 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09627 ,  H05K2201/09727 ,  H05K2201/09781 ,  H05K2201/10734 ,  H05K2203/0594 ,  Y10T29/49155 ,  Y10T29/49194 ,  Y10T428/31504

Abstract: A filet F is added to a portion constituting a corner portion C equal to or smaller than 90° in a crossing portion X of wiring patterns 58b, 58c and 58d, and a wiring pattern 58 is formed. Since the filet F is added, the wiring patterns are not made thin and are not disconnected in the crossing portion X. Further, since there is no stress concentrated to the crossing portion X, disconnection is not caused in the wiring patterns and no air bubbles are left between the crossing portion X of the wiring patterns and an interlayer resin insulating layer so that reliability of a printed wiring board is improved.

Abstract translation: 在布线图案58b，58c和58d的交叉部分X中，在构成拐角部分C等于或小于90°的部分上添加一个纸条F，并且形成布线图案58。 由于添加了纸张F，所以布线图案不会变薄，并且在交叉部分X中不会断开。另外，由于不会对交叉部分X集中的应力，因此布线图案中不会导致断线，也不会产生气泡 留在布线图案的交叉部分X和层间树脂绝缘层之间，从而提高了印刷线路板的可靠性。

公开(公告)号：US07518831B2

公开(公告)日：2009-04-14

申请号：US11243712

申请日：2005-10-04

Applicant: John Leland Moore ,  Matthew Clarke Barsotti

Inventor： John Leland Moore ,  Matthew Clarke Barsotti

IPC: G11B5/008

CPC classification number: G11B5/4893 ,  G11B5/00826 ,  H05K1/0228 ,  H05K1/0393 ,  H05K2201/0352 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/09727

Abstract: A dual layer flexible circuit for tape drives is provided that has a flexible substrate with first and second sides. A plurality of write trace pairs are provided on the substrate, with each write trace pair including a first write trace on the first side of the substrate and a second write trace on the second side of the substrate opposing the first write trace. Each first write trace has a width that is narrower than the width of each second write trace, thereby allowing for compensation of misalignment between the trace layers, avoiding variation in the capacitance and inductance of the full circuit.

Abstract translation: 提供了一种用于磁带驱动器的双层柔性电路，其具有带有第一和第二侧面的柔性基板。 在衬底上提供多个写入轨迹对，其中每个写入轨迹对包括在衬底的第一侧上的第一写入迹线和与第一写入轨迹相对的衬底的第二侧上的第二写入轨迹。 每个第一写入迹线的宽度窄于每个第二写入迹线的宽度，从而允许补偿迹线层之间的未对准，从而避免全电路的电容和电感的变化。

公开(公告)号：US20090011617A1

公开(公告)日：2009-01-08

申请号：US12163062

申请日：2008-06-27

Applicant: Hirofumi EBE ,  Yasuto ISHIMARU

Inventor： Hirofumi EBE ,  Yasuto ISHIMARU

IPC: H01R12/00

CPC classification number: H05K1/111 ,  H01L2224/16225 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/3473 ,  H05K2201/09381 ,  H05K2201/09427 ,  H05K2201/09727 ,  H05K2201/10674 ,  Y02P70/611 ,  Y02P70/613

Abstract: Each wiring pattern is composed of a conductor layer and a tin plating layer, and includes a tip portion, a connection portion and a signal transmission portion. The width of the tip portion is equal to the width of the signal transmission portion, and the width of the connection portion is smaller than the widths of the tip portion and the signal transmission portion. The connection portions of wiring patterns and bumps of an electronic component are connected to one another, respectively, by heat-sealing when the electronic component is mounted. Respective distances A1, A2 are set to not less than 0.5 μm. Respective distances B1, B2 are set to not less than 20 μm. The thickness of the tin plating layer is set to not less than 0.07 μm and not more than 0.25 μm.

Abstract translation: 每个布线图案由导体层和镀锡层组成，并且包括尖端部分，连接部分和信号传输部分。 前端部分的宽度等于信号传输部分的宽度，连接部分的宽度小于前端部分和信号传输部分的宽度。 电子部件的布线图案和凸块的连接部分分别通过在安装电子部件时进行热封而相互连接。 各距离A1，A2设定为不小于0.5μm。 各距离B1，B2设定为不小于20um。 镀锡层的厚度设定为0.07μm以上且0.25μm以下。

公开(公告)号：US07468509B2

公开(公告)日：2008-12-23

申请号：US11504248

申请日：2006-08-14

Applicant: James Frank Caruba

Inventor： James Frank Caruba

IPC: G01R23/02

CPC classification number: H05K1/0219 ,  H05K1/0237 ,  H05K1/0263 ,  H05K1/0265 ,  H05K1/118 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/09727

Abstract: A single interconnection unit provides all of the signal connections required to operate a group of PMTs and to transmit signals therefrom to acquisition electronics exterior to an enclosure for the PMTs in a nuclear scanner. In a preferred embodiment, the interconnection unit provides a shielded differential pair connection for RF signals; power supply connections for the PMTs, providing all of the voltages required to operate PMTs and the associated circuits, as well as connections for those signals and appropriate ground planes. Preferably, interconnection unit comprises a flex circuit with end connectors designed to connect to a power supply unit and an acquisition unit remote from the PMTs. Connection points are provided along the length of the flexible circuit for connection to a PMT and provide all of the necessary connections for that PMT, including shared power supplies and ground buses, as well as connections dedicated to a particular PMT, including a dedicated RF differential pair, a dedicated digital line, and an associated ground plane.

Abstract translation: 单个互连单元提供操作一组PMT所需的所有信号连接，并将信号从其发送到用于核扫描仪中的PMT的外壳的采集电路。 在优选实施例中，互连单元提供用于RF信号的屏蔽差分对连接; PMT的电源连接，提供操作PMT和相关电路所需的所有电压，以及这些信号和适当接地层的连接。 优选地，互连单元包括柔性电路，其具有设计成连接到远离PMT的电源单元和采集单元的端部连接器。 沿着柔性电路的长度提供连接点以连接到PMT，并提供该PMT的所有必要连接，包括共享电源和接地总线，以及专用于特定PMT的连接，包括专用RF差分 配对，专用数字线路和相关的接地平面。

公开(公告)号：US07466021B2

公开(公告)日：2008-12-16

申请号：US11381357

申请日：2006-05-02

Applicant: Joseph Charles Fjelstad

Inventor： Joseph Charles Fjelstad

IPC: H01L23/04

CPC classification number: G11C5/04 ,  B82Y10/00 ,  G01R31/2822 ,  G11C5/063 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/5389 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49433 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/1903 ,  H01L2924/19039 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01P3/08 ,  H01P5/028 ,  H05K1/024 ,  H05K1/0243 ,  H05K2201/0191 ,  H05K2201/09154 ,  H05K2201/09727 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: Disclosed are IC package structures having stair stepped layers and which have no plated vias. Such structures can be fabricated either as discrete packages or as strips such as might be beneficial in for use with memory devices wherein critical or high speed signals can be routed along the length of the multi-chip strip package without having to have the signals ascend and descend from the interconnection substrate on which the assembly is mounted to the IC package termination and back as the signal transmits between devices.

Abstract translation: 公开了具有楼梯阶层并且没有电镀通孔的IC封装结构。 这样的结构可以被制造成分立的封装或者条带，例如可能有利于与存储器件一起使用，其中关键或高速信号可以沿着多芯片条封装的长度布线，而不必使信号上升， 随着信号在设备之间传输，从其上安装组件的互连基板下降到IC封装端接和返回。

公开(公告)号：US07455531B2

公开(公告)日：2008-11-25

申请号：US11904924

申请日：2007-09-28

Applicant: Hidekazu Hirabayashi ,  Tomoaki Miyashita

Inventor： Hidekazu Hirabayashi ,  Tomoaki Miyashita

IPC: H01R12/00

CPC classification number: H01R12/7076 ,  G02F1/13452 ,  H01R12/77 ,  H01R13/025 ,  H05K1/118 ,  H05K3/242 ,  H05K2201/09709 ,  H05K2201/09727 ,  Y10S439/951

Abstract: The disclosure is directed to flexible boards, electrooptic devices having flexible boards, and electronic devices. In one example, wires are disposed longitudinally along the length of a flexible board. Terminals are arranged laterally across the width of the flexible board near an end of the flexible board, the terminals being electrically connected to the wires. Plating lead wires are electrically connected to the terminals and extend longitudinally from the terminals to a lateral edge of the flexible board. The width of the plating lead wires is less than the width of the wires. In certain embodiments, at least a portion of the terminals are alternatingly displaced on the flexible board in a staggered manner. This abstract is intended only to aid those searching patents, and is not intended to be used to interpret or limit the scope or meaning of the claims in any manner.

Abstract translation: 本公开涉及柔性板，具有柔性板的电光装置和电子装置。 在一个示例中，电线沿着柔性板的长度纵向设置。 端子横跨柔性板的宽度布置在柔性板的端部附近，端子电连接到电线。 电镀引线与端子电连接并从端子纵向延伸到柔性板的侧边缘。 电镀引线的宽度小于导线的宽度。 在某些实施例中，终端的至少一部分以交错的方式在柔性板上交替地移位。 本摘要仅用于帮助那些搜索专利，并不意图用于以任何方式解释或限制权利要求书的范围或含义。

公开(公告)号：US07453338B2

公开(公告)日：2008-11-18

申请号：US11533676

申请日：2006-09-20

Applicant: Lewis B. Aronson

Inventor： Lewis B. Aronson

IPC: H03H7/38 ,  H05K1/18

CPC classification number: H05K1/117 ,  G02B6/43 ,  H01R12/721 ,  H01R13/6585 ,  H05K1/0216 ,  H05K2201/0373 ,  H05K2201/093 ,  H05K2201/094 ,  H05K2201/09681 ,  H05K2201/09727

Abstract: This disclosure concerns systems and devices configured to implement impedance matching schemes in a high speed data transmission environment. In one example, an electrical connection system is provided that includes a circuit board upon which are disposed a one or more signal contact pads, each of which is configured to communicate with a complementary element of an external electrical device such that a respective shunt capacitance is defined. One or more of the signal contact pads define at least one open portion through which communication signals cannot pass. The open portions of the one or more signal contact pads are configured to reduce a shunt capacitance that is defined at the coupling of each signal contact pad and corresponding connector. As well, one or more signal lines are likewise disposed on the circuit board such that each signal line is connected to a respective one of the signal contact pads. The circuit board finally includes one or more ground contact pads and power contact pads.

Abstract translation: 该公开涉及被配置为在高速数据传输环境中实现阻抗匹配方案的系统和设备。 在一个示例中，提供了一种电连接系统，其包括电路板，在该电路板上布置有一个或多个信号接触焊盘，每个信号接触焊盘被配置为与外部电气设备的互补元件通信，从而定义相应的分流电容 。 一个或多个信号接触垫限定通信信号不能通过的至少一个开口部分。 一个或多个信号接触焊盘的开口部分被配置为减小在每个信号接触焊盘和对应的连接器的耦合处限定的并联电容。 同样，一个或多个信号线同样设置在电路板上，使得每个信号线连接到相应的一个信号接触焊盘。 电路板最后包括一个或多个接地焊盘和电源接触焊盘。

公开(公告)号：US20080264683A1

公开(公告)日：2008-10-30

申请号：US12148804

申请日：2008-04-22

Applicant: Tatsuya Watanabe ,  Masahiko Imoto ,  Hideyuki Iiboshi ,  Shinichi Awano

Inventor： Tatsuya Watanabe ,  Masahiko Imoto ,  Hideyuki Iiboshi ,  Shinichi Awano

IPC: H05K1/16 ,  H05K3/20

CPC classification number: H05K3/3442 ,  H01L2924/0002 ,  H05K1/111 ,  H05K1/183 ,  H05K3/202 ,  H05K2201/0382 ,  H05K2201/062 ,  H05K2201/0969 ,  H05K2201/09727 ,  H05K2201/09745 ,  H05K2201/10636 ,  H05K2201/2081 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

Abstract: A metal wiring plate includes a soldering portion to which an electronic device is soldered and a wiring portion extending from the soldering portion and configured to electrically connect the electronic device to other device. The wiring portion includes a narrow portion located adjacent to the soldering portion. The width of the narrow portion is less than the width of the soldering portion so that the narrow portion helps prevent melted solder applied to the soldering portion from spreading to areas outside the soldering portion. The narrow portion allows the electronic apparatus to be surely soldered to the soldering portion without using solder resist.

Abstract translation: 金属布线板包括焊接电子器件的焊接部分和从焊接部分延伸的配线部分，并且将电子器件电连接到其他器件。 布线部分包括邻近焊接部分的窄部分。 窄部分的宽度小于焊接部分的宽度，使得窄部分有助于防止施加到焊接部分的熔融焊料扩散到焊接部分外部的区域。 狭窄部分允许电子设备可靠地焊接到焊接部分而不使用阻焊剂。