Abstract:
A method for manufacturing an interposer includes forming a via hole in an insulation plate including a resin or a ceramic; simultaneously forming resists for a first upper redistribution layer on the top surface of the insulation plate, and a resistor for a lower redistribution layer on the bottom surface of the insulation plate; plating copper to fill the via hole and simultaneously forming the first upper redistribution layer and the lower redistribution layer along a designed circuit pattern; and forming a first upper protection layer and a lower protection layer to expose a portion of the first upper redistribution layer and a portion of the lower redistribution layer.
Abstract:
An electronic device module includes a first substrate having at least one or more electronic devices mounted on one surface thereof, a second substrate bonded to one surface of the first substrate and including at least one device accommodating part having a space in which the electronic device is accommodated, and a shielding member disposed in the device accommodating part and accommodating at least one or more electronic devices therein.
Abstract:
A socket housing and method of making the socket housing. A plurality of dielectric layers are printed with a plurality of recesses on a substrate. The dielectric layers include at least two different dielectric materials. A sacrificial material is printed in the recesses. The assembly is removed from the substrate and the sacrificial material is removed from the recesses. At least one contact member is located in a plurality of the recesses. Distal ends of the contact members are adapted to electrically couple with circuit members.
Abstract:
A stress buffer sheet 10 is constituted by arranging external conductive layers 16A and 16B on the front and rear main surfaces of a through electrode layer 13. Columnar internal electrodes 14 are formed using a porous oxide base material 30 formed by anodic oxidation of valve metal; the oxide base material 30 is selectively removed after the internal electrodes 14 have been formed, and a resin 12 is filled in a resultant void space. The resin 12 has a small Young's modulus and can be deformed together with the internal electrode 14. In a structure having a wiring board 20 and an electronic component 24 connected through the stress buffer sheet 10, when stress acts on the joint portion during mounting of the electronic component 24, the whole of the through electrode layer 13 is deformed so that the stress is absorbed or released.
Abstract:
A probe head of vertical probe card and a manufacturing method of a composite board thereof are provided. The probe head includes guide plate, composite board, and probe pin. The composite board includes first board layer and second board layer which are laminated together by joining operation. The composite board further includes through hole which is made by drilling and passed all the way through the first board layer and the second board layer. The friction coefficient of the first board layer is less than that of the second board layer, and the thermal expansion coefficient of the second board layer is less than that of the first board layer. The probe pin is penetrated all the way through the through hole of the composite board. By this, friction between the probe pin and composite board is reduced so as to stabilize the position of the probe pin.
Abstract:
An electronic component package includes a support and heat conductor. The heat conductor has a protuberance and the support has a socket arranged to be able to receive the protuberance so that the movement of heat conductor relative to the support during the assembly process is reduced.
Abstract:
A printed board is provided, which includes at least a first connecting electrode and a second connecting electrode. A solder is provided over the first connecting electrode and the second connecting electrode, and a chip component is provided over the solder. The chip component includes a first terminal electrode and a second terminal electrode. The first connecting electrode is overlapped with the first terminal electrode and is electrically connected to the first terminal electrode through the solder. The second connecting electrode is overlapped with the second terminal electrode and is electrically connected to the second terminal electrode through the solder. Two corner portions of each of the first connecting electrode and the second connecting electrode are overlapped with two corner portions of each of the first terminal electrode and the second terminal electrode.
Abstract:
A through-holed interposer is provided, including a board body, a conductive gel formed in the board body, and a circuit redistribution structure disposed on the board body. The conductive gel has one end protruding from a surface of the board body, and an area of the protruded end of the conductive gel that is in contact with other structures (e.g., packaging substrates or circuit structures) is increased, thereby strengthening the bonding of the conductive gel and reliability of the interposer.
Abstract:
A through-holed interposer is provided, including a board body, a conductive gel formed in the board body, and a circuit redistribution structure disposed on the board body. The conductive gel has one end protruding from a surface of the board body, and an area of the protruded end of the conductive gel that is in contact with other structures (e.g., packaging substrates or circuit structures) is increased, thereby strengthening the bonding of the conductive gel and reliability of the interposer.
Abstract:
A method for fabricating a semiconductor package is provided, which includes the steps of: providing a carrier having at least a semiconductor chip disposed thereon, the semiconductor chip having a first surface attached to the carrier, and an opposite second surface having a plurality of first conductive elements thereon; disposing an interposer on the first conductive elements, wherein the interposer has opposite third and fourth surfaces, the interposer is disposed on the first conductive elements via the third surface, and a plurality of conductive posts are embedded in the interposer and electrically connected to the third surface; forming an encapsulant on the carrier for encapsulating the semiconductor chip and the interposer; removing a portion of the encapsulant from the upper surface thereof and a portion of the interposer from the fourth surface thereof to expose ends of the conductive posts; and removing the carrier, thereby improving the connection quality between the semiconductor chip and the interposer.