Abstract:
This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths as narrow as 5 microns or less. A glass panel manufacturing facility, similar to those employed for making liquid crystal display, LCD, panels is preferably used to fabricate the interconnection circuits. A multi-layer interconnection circuit is fabricated on the glass panel using a release layer. A special assembly layer is formed over the interconnection circuit comprising a thick dielectric layer with openings formed at input/output (I/O) pad locations. Solder paste is deposited in the openings using a squeegee to form wells filled with solder. IC chips are provided with gold stud bumps at I/O pad locations, and these bumps are inserted in the wells to form flip chip connections. The IC chips are tested and reworked. The same bump/well connections can be used to attach fine-pitch cables. Module packaging layers are provided for hermetic sealing and for electromagnetic shielding. A blade server or supercomputer embodiment is also described.
Abstract:
A LCD device includes external terminals for metallic interconnects in a peripheral area on which TCPs are mounted. The external terminal includes a first ITO film connected to the metallic interconnect, a second ITO film formed on the first ITO film and a plurality of insulator islands sandwiched between the first ITO film and the second ITO film. The surface of the second ITO film has convex and concave portions whereby electric connection between the terminal of the TCP and the second ITO film is improved.
Abstract:
A packaging substrate and a method for fabricating the same are proposed, including: providing a substrate body having a first surface and an opposing second surface, wherein the first surface has a plurality of flip-chip solder pads and wire bonding pads and the second surface has a plurality of solder ball pads; forming a first and a second solder mask layers on the first and second surfaces respectively and forming openings in the first and second solder mask layers to expose the flip-chip solder pads, the wire bonding pads and the solder ball pads; forming first bumps on the flip-chip solder pads; and forming an electroless Ni/Pd/Au layer on the first bumps and the wire bonding pads by electroless plating, wherein the electroless Ni/Pd/Au layer has a thickness tolerance capable of meeting evenness requirements for fine pitch applications.
Abstract:
A circuit board with a buried conductive trace formed thereon according to the present invention is provided. A buried conductive trace layer is formed on the surface of a substrate and the pads of the conductive trace layer are plated with a layer of copper so that the pads are heightened to facilitate the subsequent process of molding.
Abstract:
A stacked semiconductor device primarily comprises semiconductor packages with a plurality of micro contacts and solder paste to soldering the micro contacts. Each semiconductor package comprises a substrate and a chip disposed on the substrate. The micro contacts of the bottom semiconductor package are a plurality of top bumps located on the upper surface of the substrate. The micro contacts of the top semiconductor package are a plurality of bottom bumps located on the lower surface of the substrate. The bottom bumps are aligned with the top bumps and are electrically connected each other by the solder paste. Therefore, the top bumps and the bottom bumps have the same soldering shapes and dimensions for evenly soldering to avoid breakages of the micro bumps during stacking.
Abstract:
The present invention relates to a high density circuit board for increasing the density of a circuit by impregnating fine circuit patterns inside a top part of a substrate, and a method for manufacturing the same.In accordance with the present invention, a high density circuit board includes a substrate with fine circuit patterns impregnated inside top and bottom parts; a via formed inside the substrate to electrically conduct the fine circuit patterns of the top and bottom parts of the substrate each other; pads formed on the fine circuit patterns of the top part of the substrate; and solder resists formed on the top and bottom parts of the substrate, which can convert the circuit patterns into fine pitches and increase the degree of close adhesion between the substrate and the circuit patterns, thereby improving reliability.
Abstract:
The connecting structure of a flexible circuit board and electronic components, includes: the flexible circuit board having: a pattern of wires, holes passing through the flexible circuit board in a thickness direction of the wires at parts of the wires to which the electronic components are connected, and a weakened part arranged on a bending line in a bending part of the flexible circuit board on which the flexible circuit board bends when the wires are connected with the electronic components; and the electronic components respectively having projections on parts to which the wires are connected, wherein the wires are electrically connected with the electronic components in a state where the projections are inserted in the holes and the flexible circuit board bends on the weakened part.
Abstract:
A socket includes an insulating elastomeric sheet having a penetration hole, metal circuits formed on at least one of the front and rear surfaces of the elastomeric sheet, and a through-hole having a metal film formed on an inner wall of the penetration hole. The metal circuit on the front surface of the elastomeric sheet is electrically connected to the metal circuit on the rear surface of the elastomeric sheet via the through-hole. With such a configuration of the socket, it is possible to provide a socket contact terminal and a semiconductor device having the same, which is suitable for low-resistance, large-current, and high-speed configurations.
Abstract:
Some embodiments of the present invention relate to an electronic assembly that includes a substrate and a die. The electronic assembly further includes an alignment bump on one of the die and the substrate and a group of mating bumps on the other of the die and the substrate. The group of mating bumps is positioned such that if the alignment bump engages each of the mating bumps, the die is appropriately positioned relative to the substrate at that location where the alignment bump engages the group of mating bumps. In some embodiments, the alignment bump extends from the substrate while in other embodiments the alignment bump extends from the die. The alignment bump on the substrate (or die) may be part of a plurality of alignment bumps such that each alignment bump engages a different group of mating bumps on the die (or substrate).
Abstract:
To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in said first non-plating region. Then, an accelerator film is applied globally on the workpiece. A portion of the accelerator film is selectively removed from the field region, and another portion of the accelerator film remains in the recessed acceleration region. Then, metal is deposited onto the workpiece, and the metal deposits at an accelerated rate in the acceleration region, resulting in a greater thickness of metal in the acceleration region compared to metal in the non-activated field region. Then, metal is completely removed from the field region, thereby forming the metal feature.