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    Wiring board
    121.
    发明申请
    Wiring board 失效
    接线板

    公开(公告)号：US20010050182A1

    公开(公告)日：2001-12-13

    申请号：US09795765

    申请日：2001-02-27

    Inventor： Yoshihiro Takeshita ,  Shinya Terao ,  Satoru Takenouchi ,  Masaki Kaji ,  Ryuji Koga

    IPC: H05K001/11 ,  H05K007/02 ,  H05K007/06

    CPC classification number: H05K1/0234 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K1/0224 ,  H05K1/0298 ,  H05K1/167 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/0969 ,  H05K2201/098 ,  H05K2201/10689 ,  H01L2924/00

    Abstract: A wiring board of the present invention readily controls a power source voltage and unwanted irradiation noises developed across a power source layer and a ground layer over a broad range of frequencies with a simple arrangement. The wiring board has an on-board surface on the surface of a dielectric substrate, on which a semiconductor device or the like is mounted, and a power source layer and a ground layer, which are made of a conductor material principally composed of at least one kind of element selected from Cu, W, and Mo, are provided on the back surface of the dielectric substrate or within the same. The periphery of at least one of low resistance areas of the power source layer and ground layer, respectively is provided with a corresponding high resistance area having a higher sheet resistance than that of the respective low resistance areas.

    Abstract translation: 本发明的布线基板通过简单的布置容易地控制在宽频率范围内在电源层和接地层两端产生的电源电压和不期望的照射噪声。 布线基板在其上安装有半导体器件等的电介质基板的表面上具有板状表面，电源层和接地层由导体材料制成，主要由至少包括 在电介质基板的背面或其内部设置选自Cu，W和Mo中的一种元素。 电源层和接地层的至少一个低电阻区域的周边分别设置有相对于各个低电阻区域的薄层电阻高的相应的高电阻区域。

    Substrate with solder alloy for mounting electronic parts
    122.
    发明授权
    Substrate with solder alloy for mounting electronic parts 有权
    带焊料合金的基板用于安装电子部件

    公开(公告)号：US06280858B1

    公开(公告)日：2001-08-28

    申请号：US09619470

    申请日：2000-07-19

    Applicant: Kouichi Teshima

    Inventor： Kouichi Teshima

    IPC: B32B1504

    CPC classification number: H05K3/3463 ,  B23K35/262 ,  H01L23/488 ,  H01L2224/16225 ,  H01L2924/12044 ,  H05K1/111 ,  H05K3/3421 ,  H05K2201/098 ,  H05K2201/10689 ,  Y02P70/611 ,  Y10T428/1266 ,  Y10T428/12708 ,  Y10T428/12715 ,  Y10T428/12792 ,  H01L2924/00

    Abstract: Disclosed is a solder alloy in use for bonding electric or electronic parts, containing: 3 to 12% by weight of a zin component; and a tin component. The oxygen content of the solder alloy is reduced to 100 ppm or less. Using the solder alloy, a bonding portion is formed on the substrate and the electronic part is mounted thereon to obtain a substrate for mounting the electronic part and a substrate on which the electronic part is mounted. The bonding portion made of the above solder alloy can prevent migration.

    Abstract translation: 公开了用于粘接电子或电子部件的焊料合金，其包含：3至12重量％的锌组分; 和锡组分。 焊料合金的氧含量降低到100ppm以下。 使用焊料合金，在基板上形成接合部，并且将电子部件安装在其上，以获得用于安装电子部件的基板和安装有电子部件的基板。 由上述焊料合金制成的接合部可以防止迁移。

    Microstrip line
    124.
    发明授权
    Microstrip line 失效
    微带线

    公开(公告)号：US4600663A

    公开(公告)日：1986-07-15

    申请号：US659503

    申请日：1984-10-10

    Applicant: Brian T. Robertson

    Inventor： Brian T. Robertson

    IPC: H01P3/08 ,  H01P11/00 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K3/24 ,  C03C27/02

    CPC classification number: H01P3/081 ,  H01P11/003 ,  H05K1/0242 ,  H05K3/245 ,  H05K1/0237 ,  H05K1/0306 ,  H05K1/092 ,  H05K2201/035 ,  H05K2201/098 ,  H05K2203/1476 ,  Y10S428/925 ,  Y10T428/12396 ,  Y10T428/12611

    Abstract: A method for fabricating a microstrip resonator line permitting precise control of line width, edge definition and thickness. On a substrate, there is printed a first conductive layer having a precisely controlled width. This first layer has a thickness less than the desired thickness of the resonator line. Further conductive layers are printed over the first layer to build up to the desired thickness of the resonator line based on skin depth requirement at the frequency of operation. Each of the further conductive layers for building the thickness of the line has a width less than that of the first conductive layer so that resonator line width is controlled by the width of the first layer.

    Abstract translation: 一种用于制造微带谐振器线的方法，其允许精确控制线宽，边缘清晰度和厚度。 在基板上印刷具有精确控制宽度的第一导电层。 该第一层的厚度小于谐振器线的所需厚度。 基于在操作频率下的皮肤深度要求，在第一层上印刷进一步的导电层以形成谐振器线的期望厚度。 用于构建线的厚度的每个另外的导电层具有小于第一导电层的宽度的宽度，使得谐振器线宽度受到第一层的宽度的控制。

    Circuit board structure
    127.
    发明授权
    Circuit board structure 有权

    公开(公告)号：US11818833B2

    公开(公告)日：2023-11-14

    申请号：US17867624

    申请日：2022-07-18

    Applicant: Unimicron Technology Corp.

    Inventor： Shih-Lian Cheng

    IPC: H05K1/02 ,  H01L23/498 ,  H05K1/14

    CPC classification number: H05K1/0222 ,  H01L23/49822 ,  H01L23/49833 ,  H05K1/024 ,  H05K1/144 ,  H05K2201/098 ,  H05K2201/0959 ,  H05K2201/09672

    Abstract: A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole electrically connected to the first and second external circuit layers, a first annular retaining wall surrounding the conductive through hole, and a second annular retaining wall surrounding the conductive through hole. The first annular retaining wall is electrically connected to the first external circuit layer and a first inner circuit layer. The second annular retaining wall is electrically connected to the second external circuit layer and a second inner circuit layer. A first ground circuit, the first annular retaining wall, and the first inner circuit layer define a first ground path surrounding a first signal circuit. A second ground circuit, the second annular retaining wall, and the second inner circuit layer define a second ground path surrounding a second signal circuit.

    CIRCUIT BOARD STRUCTURE
    129.
    发明公开
    CIRCUIT BOARD STRUCTURE 审中-公开

    公开(公告)号：US20230156908A1

    公开(公告)日：2023-05-18

    申请号：US17867624

    申请日：2022-07-18

    Applicant: Unimicron Technology Corp.

    Inventor： Shih-Lian Cheng

    IPC: H05K1/02 ,  H01L23/498 ,  H05K1/14

    CPC classification number: H05K1/0222 ,  H01L23/49833 ,  H01L23/49822 ,  H05K1/144 ,  H05K1/024 ,  H05K2201/09672 ,  H05K2201/098 ,  H05K2201/0959

    Abstract: A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole electrically connected to the first and second external circuit layers, a first annular retaining wall surrounding the conductive through hole, and a second annular retaining wall surrounding the conductive through hole. The first annular retaining wall is electrically connected to the first external circuit layer and a first inner circuit layer. The second annular retaining wall is electrically connected to the second external circuit layer and a second inner circuit layer. A first ground circuit, the first annular retaining wall, and the first inner circuit layer define a first ground path surrounding a first signal circuit. A second ground circuit, the second annular retaining wall, and the second inner circuit layer define a second ground path surrounding a second signal circuit.

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