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131.
公开(公告)号:US20170208691A1
公开(公告)日:2017-07-20
申请号:US15389484
申请日:2016-12-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Akio MASUNARI , Hirokazu TAKASHIMA , Tomoyuki NAKAMURA
CPC classification number: H05K1/181 , H01G2/065 , H01G4/005 , H01G4/12 , H01G4/2325 , H01G4/248 , H01G4/30 , H01G4/40 , H05K1/09 , H05K1/111 , H05K3/3421 , H05K3/3426 , H05K2201/10015 , H05K2201/10287 , H05K2201/10636 , H05K2203/048 , H05K2203/049 , Y02P70/611 , Y02P70/613
Abstract: A multilayer ceramic capacitor includes a ceramic element body including first and second external electrodes on first and second end surface sides of the ceramic element body, respectively. The first external electrode includes an Ni plating layer and an Sn plating layer defining a plating layer. The second external electrode includes an Au plating layer defining a plating layer.
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公开(公告)号:US09699909B2
公开(公告)日:2017-07-04
申请号:US14455012
申请日:2014-08-08
Applicant: IBIDEN CO., LTD.
Inventor: Naohito Ishiguro , Yasushi Inagaki
CPC classification number: H05K1/185 , H01L2224/16227 , H01L2924/15311 , H05K3/4602 , H05K3/4644 , H05K2201/10 , H05K2201/10015 , H05K2201/10507 , H05K2203/0156
Abstract: A wiring board with a built-in electronic component includes a core substrate, an electronic component in the substrate, a first upper-layer structure on first surface of the substrate, a second upper-layer structure on second surface of the substrate, and via conductors in the substrate and first upper-layer structure such that the via conductors are connected to an electrode of the component. The substrate has an accommodating layer, a first connection layer on first surface of the accommodating layer, and a second connection layer on second surface of the accommodating layer, the accommodating layer includes inner wiring and insulation layers and has cavity accommodating the component, the first connection layer includes inner wiring and insulation layers, and the second connection layer includes inner wiring and insulation layers such that the second connection layer includes greater number of inner wiring and insulation layers than the first connection layer.
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公开(公告)号:US09698130B2
公开(公告)日:2017-07-04
申请号:US15272568
申请日:2016-09-22
Inventor: Gerald Weis , Christian Vockenberger , Roland Sekavcnik
IPC: H01L23/34 , H01L25/16 , H01L23/467 , H01L23/538 , H01L23/00 , H01L25/07 , H05K1/02 , H05K1/11 , H05K1/18 , H05K7/20 , H01L23/367 , H01L25/10
CPC classification number: H01L25/16 , H01L23/3677 , H01L23/467 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L24/17 , H01L24/19 , H01L24/20 , H01L25/074 , H01L25/105 , H01L2223/6677 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/2518 , H01L2225/1035 , H01L2225/1047 , H01L2225/1094 , H01L2924/1033 , H01L2924/13055 , H01L2924/1306 , H01L2924/1426 , H01L2924/1436 , H01L2924/153 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19102 , H01L2924/19105 , H05K1/0206 , H05K1/0209 , H05K1/0212 , H05K1/0298 , H05K1/115 , H05K1/181 , H05K1/185 , H05K7/20154 , H05K2201/10015 , H05K2201/10166 , Y02P70/611
Abstract: In a connection system for electronic components (1) comprising a plurality of insulating layers (2) and conductive layers (3) and further comprising at least one embedded electronic component (4) embedded within at least one of the plurality of insulating layers (2) and conductive layers (3) the at least one embedded electronic component (4) is at least one first transistor having a bulk terminal thereof in thermal contact with a thermal duct (6) comprised of a plurality of vias (7) reaching through at least one of an insulating layer (2) and a conductive layer (3) of the connection system for electronic components (1) and emerging on a first outer surface (8) of the connection system for electronic components (1) under a first surface-mounted component (10).
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公开(公告)号:US20170181288A1
公开(公告)日:2017-06-22
申请号:US15386172
申请日:2016-12-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yasuo FUJII
CPC classification number: H05K1/185 , H01G2/06 , H01G4/005 , H01G4/232 , H01G4/248 , H01G4/30 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L24/17 , H01L2224/16227 , H01L2224/16235 , H01L2924/152 , H01L2924/19041 , H01L2924/19102 , H05K1/115 , H05K1/181 , H05K2201/10015
Abstract: In a capacitor, a width in a length direction of a first portion of a third outer electrode, which is a portion located on a first side surface, is greater than a width in a length direction of a second portion of the third outer electrode, which is a portion located on a first main surface. The first portion of the third outer electrode does not extend to first and second end surfaces.
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公开(公告)号:US20170181286A1
公开(公告)日:2017-06-22
申请号:US14977321
申请日:2015-12-21
Applicant: Intel Corporation
Inventor: Ladd D. CAMPBELL , Scott M. MOKLER , Juan LANDEROS , Michael HILL , Jin ZHAO
CPC classification number: H05K1/183 , H05K1/0231 , H05K1/113 , H05K1/181 , H05K3/3436 , H05K3/3442 , H05K3/4697 , H05K2201/09845 , H05K2201/10015 , H05K2201/10515 , H05K2201/1053 , H05K2201/10734 , Y02P70/611
Abstract: Embodiments of the invention include a printed circuit board (PCB) assembly that includes advanced component in cavity (ACC) technology and methods of forming such PCB assemblies. In one embodiment, the PCB assembly may include a PCB that has a cavity formed on a first surface of the PCB. A plurality of contacts may be formed in the cavity. The cavity provides a location where components may be electrically coupled to the PCB. Additionally, a package that is mounted to the PCB may extend over the cavity. Since the package passes directly over the component, the components may be used to electrically couple the package to one or more of the contacts formed in the cavity. Accordingly, embodiments of the invention allow for the surface area used for components to be reduced, and also improves electrical performance of the PCB assembly by positioning the components proximate to the package.
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公开(公告)号:US09685273B2
公开(公告)日:2017-06-20
申请号:US15051648
申请日:2016-02-23
Applicant: ROHM CO., LTD.
Inventor: Hiroki Yamamoto , Keishi Watanabe , Hiroshi Tamagawa
IPC: H01L27/00 , H01G4/30 , H01L23/522 , H01L27/10 , H01L27/24 , H01L23/00 , H01G4/40 , H01L29/66 , H01L29/94 , H01G2/06 , H05K1/11 , H05K1/16 , H05K1/18 , H01L21/66 , H01L27/06 , H01G4/005 , H01G4/228 , H01G4/232
CPC classification number: H01G4/30 , H01G2/06 , H01G4/005 , H01G4/228 , H01G4/232 , H01G4/40 , H01L22/14 , H01L22/20 , H01L23/5223 , H01L24/48 , H01L24/49 , H01L27/0629 , H01L27/0676 , H01L27/101 , H01L27/2409 , H01L28/40 , H01L29/66189 , H01L29/94 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/48227 , H01L2224/49175 , H01L2924/00014 , H01L2924/0002 , H05K1/111 , H05K1/162 , H05K1/18 , H05K1/181 , H05K3/3436 , H05K2201/10015 , H05K2201/10045 , Y02P70/611 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/85399
Abstract: A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.
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137.
公开(公告)号:US09685272B2
公开(公告)日:2017-06-20
申请号:US14754282
申请日:2015-06-29
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Young Ghyu Ahn , Hyun Tae Kim , Kyo Kwang Lee , Jin Kim , Byoung Hwa Lee , Hwi Geun Im
CPC classification number: H01G4/30 , H01G2/065 , H01G4/012 , H01G4/12 , H01G4/228 , H01G4/232 , H01G4/2325 , H05K1/111 , H05K1/181 , H05K2201/10015 , Y02P70/611
Abstract: A multilayer ceramic capacitor and a board having the same are provided. The multilayer ceramic capacitor includes three external electrodes including a conductive layer, a nickel plating layer, and a tin plating layer sequentially stacked on a mounting surface of the ceramic body, and spaced apart from each other. When an outermost portion of a lead-out portion of an internal electrode exposed to the mounting surface is P, a total thickness of the conductive layer, the nickel plating layer, and the tin plating layer in a normal line direction of the conductive layer from P is a, a thickness of the conductive layer in the normal line direction of the conductive layer from P is b, and a sum of pore heights of pores existing in the conductive layer in the normal line direction of the conductive layer from P is bp, (b−bp)/a satisfies 0.264≦(b−bp)/a≦0.638.
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公开(公告)号:US20170171980A1
公开(公告)日:2017-06-15
申请号:US15444425
申请日:2017-02-28
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kazuo HATTORI , Isamu FUJIMOTO , Masaru TAKAHASHI , Choichiro FUJII , Hirobumi ADACHI
CPC classification number: H05K1/185 , H01G4/005 , H01G4/12 , H01G4/224 , H01G4/228 , H01G4/232 , H01G4/30 , H05K1/0271 , H05K2201/0133 , H05K2201/10015 , H05K2201/10378
Abstract: An electronic component containing substrate includes a substrate, a first electronic component mounted on a main surface of the substrate, and an embedment layer provided on the main surface of the substrate and embedding the first electronic component. The first electronic component is a multilayer ceramic capacitor including a ceramic multilayer body including a layered portion and a first side portion and a second side portion between which the layered portion lies and having two end surfaces opposed to each other and side surfaces connecting the two end surfaces to each other. The first side portion is located between the layered portion and the main surface of the substrate in a direction of thickness which is a direction perpendicular to the main surface of the substrate. The embedment layer is smaller in elastic modulus than the substrate.
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公开(公告)号:US09679699B2
公开(公告)日:2017-06-13
申请号:US14906341
申请日:2014-07-30
Applicant: KYOCERA Corporation
Inventor: Kousei Kamigaki
IPC: H01G4/06 , C04B35/00 , H01G4/18 , C08K3/00 , C08L101/00 , H01G4/12 , H01G4/20 , C08K9/10 , H05K1/18 , C04B35/468 , H01G4/33
CPC classification number: H01G4/18 , C01G23/006 , C01P2002/50 , C01P2002/52 , C01P2004/64 , C04B35/4682 , C04B35/62645 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3225 , C04B2235/3244 , C04B2235/3293 , C04B2235/5445 , C04B2235/5454 , C08K3/00 , C08K3/22 , C08K9/10 , C08L101/00 , H01G4/1209 , H01G4/1227 , H01G4/206 , H01G4/33 , H05K1/18 , H05K2201/10015 , C08L23/20
Abstract: There are provided a dielectric film, a film capacitor and an electric device capable of achieving an increase in relative permittivity without causing a decrease in breakdown field strength. A dielectric film includes an organic resin and ceramic particles contained in the organic resin. The ceramic particles each have a crystal lattice defined by three axes composed of axis a, axis b, and axis c, and including two or more crystalline phases of different axial ratios c/a. Owing to each crystal phase having different extents of dielectric polarization originating from the differences in shapes (sizes) of the crystal lattices, the ceramic particles each have regions with different permittivities, achieving an increase in relative permittivity without causing a decrease in breakdown field strength.
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140.
公开(公告)号:US09655249B2
公开(公告)日:2017-05-16
申请号:US14644289
申请日:2015-03-11
Applicant: IBIDEN CO., LTD. , MURATA MANUFACTURING CO., LTD.
Inventor: Toyotaka Shimabe , Masahiro Kaneko , Toshiki Furutani , Takeshi Tashima , Yasuyuki Shimada , Naoki Shimizu
IPC: H05K1/18 , H01G4/008 , H01G4/228 , H01G2/06 , H01L23/50 , H01G4/30 , H01G4/12 , H05K3/46 , H01L23/498
CPC classification number: H05K1/185 , H01G2/06 , H01G4/008 , H01G4/1227 , H01G4/30 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L2924/0002 , H05K3/4602 , H05K2201/068 , H05K2201/10015 , Y10T29/43 , H01L2924/00
Abstract: A substrate with a built-in capacitor includes an insulating base material layer, a build-up layer formed on the insulating base material layer and including a conductor layer and an insulating layer, and a multilayer ceramic capacitor positioned in an opening of the base material layer and including internal electrodes, ceramic dielectric layers and a pair of external electrodes. The ceramic capacitor has a cuboid shape having long sides and short sides, the pair of external electrodes is formed on opposing long-side sides such that the external electrodes are separated by a distance in range of 30 μm to 200 μm and that each external electrode includes a conductive paste layer connected to a respective group of the internal electrodes and a copper plated layer covering the conductive paste layer, and the conductive paste layer includes Ni paste or Cu paste including glass component in range of 5% to 40%.
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