公开(公告)号：US07928557B2

公开(公告)日：2011-04-19

申请号：US11953365

申请日：2007-12-10

Applicant: Kiyoshi Oi ,  Teruaki Chino

Inventor： Kiyoshi Oi ,  Teruaki Chino

IPC: H01L23/48 ,  H01L23/02

CPC classification number: H01L25/105 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K3/3436 ,  H05K3/3447 ,  H05K2201/10242 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10719 ,  H05K2201/10946 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: In a stacked package in which a plurality of packages having semiconductor elements mounted on substrates are stacked, while being electrically connected together, by use of connection sections, wherein the connection sections are formed from pillar-like members and solder joint sections and the upper package is supported on the lower package by pillar-like members.

Abstract translation: 在其中通过使用连接部分而电连接在一起的多个具有安装在基板上的半导体元件的封装的堆叠封装中，其中连接部分由柱状部件和焊接部分形成，并且上部封装 由柱状构件支撑在下部封装上。

公开(公告)号：US20100284159A1

公开(公告)日：2010-11-11

申请号：US12837078

申请日：2010-07-15

Applicant: Hideyuki Sakamoto ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

Inventor： Hideyuki Sakamoto ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

IPC: H05K5/00

CPC classification number: H05K1/144 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3447 ,  H05K5/065 ,  H05K2201/042 ,  H05K2201/10318 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.

Abstract translation: 提供了能够增加封装密度并防止引入电路元件之间的热干扰的电路装置。 在混合集成电路装置中，第一电路板和第二电路板以第一电路板与第二电路板重叠的方式装配到壳体构件中。 第一电路元件布置在第一电路板的上表面上，第二电路元件布置在第二电路板的上表面上。 此外，在壳体内设置有未填充有密封树脂的中空部。 这样的结构防止作为微型计算机的第二电路元件例如由于在作为功率晶体管的第一电路元件中产生的热而不稳定地运行。

公开(公告)号：US07813142B2

公开(公告)日：2010-10-12

申请号：US11952973

申请日：2007-12-07

Applicant: Kuan-Chang Lin ,  Ting-Chang Chang

Inventor： Kuan-Chang Lin ,  Ting-Chang Chang

IPC: H01R9/00

CPC classification number: H01R13/2421 ,  H01R12/714 ,  H05K1/0215 ,  H05K2201/10318 ,  H05K2203/176

Abstract: A portable electronic device (20) includes a circuit board (21) and at least one conducting pole (22). The conducting pole is mounted on the circuit board and includes a breakable portion (2224), the breakable portion is configured to be the part that breaks when the conducting pole is crumpled.

Abstract translation: 便携式电子设备（20）包括电路板（21）和至少一个导电极（22）。 所述导电极安装在所述电路板上，并且包括可破坏部分（2224），所述可破坏部分被构造为当所述导电柱被弄皱时所述部件断裂。

公开(公告)号：US07791185B2

公开(公告)日：2010-09-07

申请号：US11758401

申请日：2007-06-05

Applicant: Mengzhi Pang

Inventor： Mengzhi Pang

IPC: H01L23/48

CPC classification number: H05K3/3426 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15312 ,  H05K2201/10318 ,  Y02P70/613 ,  Y10S439/935 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An electrically conductive pin comprising a pin stern and a pin head attached to the pin stem. The pin head is adapted to be mounted onto a surface of a microelectronic substrate to support the pin stem. The pin head has an underside surface defining a continuous curve configured to allow gases to escape from a pin-attach solder region adjacent the underside surface.

Abstract translation: 一种导电销，其包括销尾和连接到销杆的销头。 针头适于安装在微电子衬底的表面上以支撑销杆。 针头具有限定连续曲线的下表面，该曲线构造成允许气体从邻近下表面的针附着焊料区域逸出。

公开(公告)号：US20100202126A1

公开(公告)日：2010-08-12

申请号：US12678855

申请日：2008-09-16

Applicant: Mikio Nakamura ,  Yu Kondo

Inventor： Mikio Nakamura ,  Yu Kondo

IPC: H05K1/11 ,  H05K13/00

CPC classification number: H05K3/368 ,  H01L21/56 ,  H01L23/3121 ,  H01L24/19 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/274 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/01079 ,  H05K1/144 ,  H05K3/284 ,  H05K3/3426 ,  H05K3/3436 ,  H05K3/4046 ,  H05K3/4647 ,  H05K2201/042 ,  H05K2201/10242 ,  H05K2201/10318 ,  H05K2203/025 ,  H05K2203/1316 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49147 ,  H01L2924/00

Abstract: There is provided a stacked mounting structure in which, it is possible to realize a narrowing of pitch and to secure a height which enables to mount components to be mounted, and a method of manufacturing stacked mounting structure.The stacked mounting structure includes a plurality of members provided with a mounting area which is necessary for installing and operating components to be mounted on at least one principal surface, and an area for connections for signal transfer for operating the components to be mounted, and an electroconductive member which is disposed on the area for connections between the mutually facing members, and a cross section of the electroconductive member is same as or smaller than the area for connections, and an end portion of the electroconductive member is extended from a principal surface of one member up to a principal surface of the other member, and a height of the electroconductive member regulates a distance of the mounting area.

Abstract translation: 提供了一种堆叠安装结构，其中可以实现节距变窄并且确保能够安装待安装部件的高度，以及制造堆叠安装结构的方法。 堆叠的安装结构包括多个构件，其设置有安装和操作要安装在至少一个主表面上的部件所需的安装区域，以及用于操作要安装的部件的信号传送的连接区域，以及 布置在相互面对构件之间的连接区域上的导电构件和导电构件的横截面与连接区域相同或更小，并且导电构件的端部从主表面延伸 一个构件直到另一构件的主表面，并且导电构件的高度调节安装区域的距离。

公开(公告)号：US20100128452A1

公开(公告)日：2010-05-27

申请号：US12624563

申请日：2009-11-24

Applicant: KAZUHITO YOKOUCHI

Inventor： KAZUHITO YOKOUCHI

IPC: H05K1/14 ,  H05K1/00 ,  H05K3/00

CPC classification number: H05K1/18 ,  H05K1/181 ,  H05K3/308 ,  H05K3/341 ,  H05K2201/10318 ,  H05K2201/10409 ,  H05K2201/105 ,  Y02P70/611 ,  Y10T29/49124

Abstract: A stud is a structure for supporting, on a printed circuit board, a mounting component such as another printed circuit board or a device. This structure is surface-mounted on the printed circuit board by soldering or press-fitting. The structure is a constituted by a columnar-shaped structure and the like. One end of the columnar-shaped structure is surface-mounted on the printed circuit board, and the other end thereof is fixed to the mounting component.

Abstract translation: 螺柱是用于在印刷电路板上支撑诸如另一印刷电路板或装置的安装部件的结构。 该结构通过焊接或压配合表面安装在印刷电路板上。 该结构由柱状结构等构成。 柱状结构的一端表面安装在印刷电路板上，另一端固定在安装部件上。

公开(公告)号：US20100065959A1

公开(公告)日：2010-03-18

申请号：US12542987

申请日：2009-08-18

Applicant: Akio Horiuchi ,  Hiroshi Yokota

Inventor： Akio Horiuchi ,  Hiroshi Yokota

IPC: H01L23/488 ,  H01L23/48 ,  H01L21/60 ,  H01L21/58

CPC classification number: H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/11003 ,  H01L2224/16 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K3/0058 ,  H05K3/4682 ,  H05K2201/10318 ,  H05K2203/063

Abstract: A semiconductor package includes a wiring substrate having a connection pad on both surface sides respectively, and a supporting plate provided on one surface side of the wiring substrate and formed of an insulator in which an opening portion is provided in a portion corresponding to the connection pad. The external connection terminals (the lead pins, or the like) are provided on the connection pads on the surface of the wiring substrate on which the supporting plate is provided, and the semiconductor chip is mounted on the connection pads on the opposite surface.

Abstract translation: 半导体封装包括分别在两个表面侧具有连接焊盘的布线基板和设置在布线基板的一个表面侧上并由绝缘体形成的支撑板，其中开口部设置在与连接焊盘相对应的部分中 。 外部连接端子（引线引脚等）设置在布置基板的设置有支撑板的表面上的连接焊盘上，并且半导体芯片安装在相对表面上的连接焊盘上。

公开(公告)号：US20090256252A1

公开(公告)日：2009-10-15

申请号：US12102793

申请日：2008-04-14

Applicant: Yumin Liu ,  Hua Yang ,  Yong Liu ,  Tiburcio A. Maldo

Inventor： Yumin Liu ,  Hua Yang ,  Yong Liu ,  Tiburcio A. Maldo

IPC: H01L23/538 ,  H01L21/60

CPC classification number: H01L23/5385 ,  H01L25/162 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/0306 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/042 ,  H05K2201/10318 ,  H05K2203/1572 ,  H01L2924/00 ,  H01L2224/05599

Abstract: An exemplary semiconductor die package is disclosed having one or more semiconductor dice disposed on a first substrate, one or more packaged electrical components disposed on a second substrate that is electrical coupled to the first substrate, and an electrically insulating material disposed over portions of the substrates. The first substrate may hold power-handling devices and may be specially constructed to dissipation heat and to facilitate fast and inexpensive manufacturing. The second substrate may hold packaged components of control circuitry for the power-handling devices, and may be specially constructed to enable fast and inexpensive wiring design and fast and inexpensive component assembly. The first substrate may be used with different designs of the second substrate.

Abstract translation: 公开了一种示例性的半导体管芯封装，其具有设置在第一衬底上的一个或多个半导体管芯，设置在电耦合到第一衬底的第二衬底上的一个或多个封装的电气部件，以及设置在衬底部分上的电绝缘材料 。 第一基板可以保持动力处理装置，并且可以被特别构造以散热并促进快速和便宜的制造。 第二基板可以保持用于功率处理装置的控制电路的封装部件，并且可以被特别构造以实现快速和便宜的布线设计以及快速和便宜的部件组装。 第一衬底可以与第二衬底的不同设计一起使用。

公开(公告)号：US20090229873A1

公开(公告)日：2009-09-17

申请号：US12468626

申请日：2009-05-19

Applicant: Toshihiko YOKOMAKU

Inventor： Toshihiko YOKOMAKU

IPC: H05K1/16

CPC classification number: H05K3/3463 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16251 ,  H05K1/0262 ,  H05K1/141 ,  H05K3/341 ,  H05K3/3415 ,  H05K3/3457 ,  H05K3/4602 ,  H05K2201/045 ,  H05K2201/10189 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10674 ,  H05K2203/1572 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  H01L2224/05599

Abstract: A component mounting method of a multilayer printed wiring board includes a plurality of solder bumps to mount electronic components formed on both of or either of the front and back thereof, wherein when the solder bumps are formed of any of first, second, third and fourth solders, the first, second, third and fourth solders have different melting points and the melting points of the first, second, third and fourth solders are arranged as the melting point of the first solder, the melting point of the second solder, the melting point of the third solder and the melting point of the fourth solder in order of high melting point and the first, second, third and fourth solders are sequentially used to solder electronic components and the like in order of high melting point. Further, in that case, it is preferable that the solder bump having large volume should be soldered earlier than other solder bumps. This multilayer printed wiring board is easy to mount components, excellent in work efficiency or easy in reworkable process and a mounting method of such multilayer printed wiring board is also provided.

Abstract translation: 多层印刷电路板的部件安装方法包括：多个焊料凸块，用于安装形成在其前后的电子元件，其中当焊料凸块由第一，第二，第三和第四 焊料，第一，第二，第三和第四焊料具有不同的熔点，第一，第二，第三和第四焊料的熔点被排列为第一焊料的熔点，第二焊料的熔点，熔化 第三焊料的点和第四焊料的熔点按照高熔点顺序依次使用，并且第一，第二，第三和第四焊料依次用于以高熔点的顺序焊接电子部件等。 此外，在这种情况下，优选地，具有大体积的焊料凸块应比其它焊料凸块更早地焊接。 该多层印刷电路板容易安装组件，工作效率优异或易于再加工的工艺，并且还提供了这种多层印刷线路板的安装方法。

公开(公告)号：US20090211798A1

公开(公告)日：2009-08-27

申请号：US12372870

申请日：2009-02-18

Applicant: Akio Horiuchi ,  Yoshikazu Hirabayashi ,  Yoshitaka Matsushita ,  Kazuhiro Oshima

Inventor： Akio Horiuchi ,  Yoshikazu Hirabayashi ,  Yoshitaka Matsushita ,  Kazuhiro Oshima

IPC: H01R12/06 ,  H05K3/20

CPC classification number: H05K3/303 ,  H01L2224/16225 ,  H05K3/284 ,  H05K3/305 ,  H05K3/3426 ,  H05K2201/10318 ,  H05K2201/10424 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49128

Abstract: A PGA type wiring board includes a wiring board to which a head portion of a pin is joined to a pad portion with solder interposed therebetween, and a pin fixing plate having a through hole formed therein through which a shank portion of the pin is inserted, and having an adhesive layer formed on one surface thereof. The pin fixing plate is bonded to the wiring board with the adhesive layer interposed therebetween while the shank portion of the pin is inserted through the through hole. The through hole is shaped in a stepped form with a two-step configuration when viewed in cross section.

Abstract translation: PGA型布线基板包括布线基板，其中引脚的头部与焊料插入其中的焊盘部分接合，并且销固定板具有形成在其中的通孔，销的柄部穿过该通孔插入， 并且在其一个表面上形成有粘合剂层。 销固定板在插入其间的粘合层的同时与布线板接合，同时销的柄部穿过通孔插入。 当从横截面观察时，通孔以阶梯形状成形为两步构造。