公开(公告)号：US20240152013A1

公开(公告)日：2024-05-09

申请号：US18416940

申请日：2024-01-19

Applicant: Sharp Display Technology Corporation

Inventor： Yoshihito HARA ,  Tohru DAITOH ,  Hajime IMAI ,  Teruyuki UEDA ,  Masaki MAEDA ,  Tatsuya KAWASAKI ,  Yoshiharu HIRATA

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/1362 ,  G03F7/00 ,  G06F3/041

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/13338 ,  G02F1/134336 ,  G02F1/13454 ,  G02F1/136286 ,  G03F7/70 ,  G06F3/0412 ,  G02F2201/42 ,  G02F2202/10 ,  G06F3/04164 ,  G06F3/044

Abstract: An active matrix substrate includes a plurality of thin film transistors including an oxide semiconductor layer, an interlayer insulating layer, a plurality of pixel electrodes arranged above the interlayer insulating layer, a common electrode arranged between the pixel electrode and the interlayer insulating layer and also configured to function as a touch sensor electrode, a first dielectric layer arranged between the interlayer insulating layer and the common electrode, a second dielectric layer arranged between the common electrode and the pixel electrode, a plurality of touch wiring lines arranged between the interlayer insulating layer and the common electrode and formed of a third conductive film, and a plurality of pixel contact portions, in which each of the plurality of pixel contact portions includes a drain electrode of the thin film transistor, a connection electrode formed of the third conductive film and electrically connected to the drain electrode in a lower opening formed in the interlayer insulating layer, and a pixel electrode electrically connected to the connection electrode in an upper opening formed in the first dielectric layer and the second dielectric layer.

公开(公告)号：US11852927B2

公开(公告)日：2023-12-26

申请号：US17983449

申请日：2022-11-09

Applicant: InnoLux Corporation

Inventor： Shun-Chen Yang ,  Ying-Tong Lin

IPC: G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/134309 ,  G02F1/136227 ,  G02F2201/123 ,  G02F2201/124 ,  G02F2201/40 ,  G02F2201/42

Abstract: A display device includes: a gate line having an extension direction; a switch unit electrically connecting to the gate line; a pixel electrode electrically connecting to the switch unit; and a slit in the pixel electrode, wherein a virtual line parallel to the extension direction passes through an end point of the slit which is closest to the gate line, the pixel electrode is divided into a first portion and a second portion by the virtual line, and the first portion is closer to the gate line than the second portion, and wherein -the slit has a first width in the extension direction and a second width in the extension direction, the second width is closer to the first portion than the first width, and the first width is less than the second width.

公开(公告)号：US20190212603A1

公开(公告)日：2019-07-11

申请号：US16355569

申请日：2019-03-15

Applicant: Apple Inc.

Inventor： Paul S. Drzaic ,  Jeremy C. Franklin ,  Stephen Brian Lynch ,  Scott A. Myers ,  Benjamin M. Rappoport ,  Fletcher R. Rothkopf ,  John P. Ternus

IPC: G02F1/1345

CPC classification number: G02F1/13452 ,  G02F2201/42

Abstract: An electronic device may be provided with a display having a thin-film transistor layer. One or more holes in the thin-film transistor layer may be used to form pathways from display circuitry to other circuitry underneath the display. One or more conductive bridges may pass through holes in the thin-film transistor layer and may have one end that couples to the display circuitry and a second end that couples to a printed circuit underneath the display. These conductive bridges may be formed from wire bonding. Wire bond connections may be encapsulated with potting material to improve the reliability of the wire bond and increase the resiliency of the display. Display signal lines may be routed through holes in a thin-film transistor layer to run along a backside of the display thereby reducing the need for space in the border region for display circuitry.

公开(公告)号：US20190150329A1

公开(公告)日：2019-05-16

申请号：US16250107

申请日：2019-01-17

Applicant: LG DISPLAY CO., LTD.

Inventor： SeongRim LEE

IPC: H05K7/20 ,  H05K13/04 ,  G02F1/1333 ,  H01L23/498 ,  G02F1/1345 ,  H05K7/14

CPC classification number: H05K7/20954 ,  G02F1/133305 ,  G02F1/13452 ,  G02F2201/42 ,  G02F2201/56 ,  G09G3/20 ,  G09G2310/0281 ,  H01L23/49827 ,  H01L23/4985 ,  H05K7/14 ,  H05K13/04

Abstract: The present aspects provide a display apparatus including a chip-on-film (COF), which may include: a plastic substrate configured to have at least one through-hole formed in one area thereof and a conductor inserted into the through-hole; a display part configured to be disposed in another area on an upper surface of the plastic substrate; a first pad part configured to have a plurality of pads, at least one of which is disposed in the one area on the upper surface of the plastic substrate to overlap the through-hole, and configured to be connected to one end of the conductor; and a second pad part configured to be disposed on a back surface of the plastic substrate, and configured to have a plurality of pads, at least one of which is in contact with the other end of the conductor, and further provide a method for manufacturing the same.

公开(公告)号：US20180213638A1

公开(公告)日：2018-07-26

申请号：US15879794

申请日：2018-01-25

Applicant: Japan Display Inc.

Inventor： Shuichi OSAWA ,  Shoji HINATA ,  Yoshikatsu IMAZEKI ,  Yoichi KAMIJO ,  Yoshihiro WATANABE

IPC: H05K1/02 ,  H05K1/11 ,  H05K5/00 ,  H05K1/03 ,  H01B1/08

CPC classification number: H05K1/0298 ,  G02F1/13338 ,  G02F2201/42 ,  G06F3/0412 ,  G06F3/044 ,  H01B1/08 ,  H05K1/0313 ,  H05K1/117 ,  H05K5/0017

Abstract: According to one embodiment, a display device includes a first substrate including a first basement and a first terminal, a second substrate including a second basement including a first surface opposing the first terminal and a second surface on an opposite side to the first surface, a second terminal located on a side of the second surface, and a first hole, an organic insulating layer located between the first terminal and the second basement and including a second hole connecting to the first hole and a connecting material provided on the first hole to electrically connect the first terminal and the second terminal to each other, at least one of the first terminal and the second terminal including an oxide electrode in contact with the connecting material.

公开(公告)号：US10001683B2

公开(公告)日：2018-06-19

申请号：US14935200

申请日：2015-11-06

Applicant: Microsoft Technology Licensing, LLC

Inventor： Andriy Pletenetskyy

IPC: H01L33/00 ,  G02F1/1347 ,  G02F1/1345 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L23/522 ,  H01L23/055 ,  H01L23/057 ,  H01L23/053 ,  H01L23/535 ,  H01L23/13 ,  H01L23/492 ,  H01L23/32 ,  H01L23/04 ,  G02F1/1362

CPC classification number: H01L23/04 ,  G02F1/13452 ,  G02F1/136277 ,  G02F2201/42 ,  G02F2202/28 ,  H01L23/053 ,  H01L23/055 ,  H01L23/057 ,  H01L23/13 ,  H01L23/32 ,  H01L23/4922 ,  H01L23/5226 ,  H01L23/535 ,  H01L23/562 ,  H01L24/48 ,  H01L2924/00014

Abstract: Disclosed is a low-profile microdisplay module that comprises a package substrate, a microdisplay chip disposed over a first surface of the package substrate, and a plurality of conductive vias. The plurality of conductive vias are electrically coupled to the microdisplay chip and disposed through the package substrate to a second surface of the package substrate, the second surface being opposite and parallel to the first surface. The microdisplay module further comprises a flexible flat circuit connector coupled to the plurality of conductive vias at the second surface of the package substrate.

公开(公告)号：US20180031938A1

公开(公告)日：2018-02-01

申请号：US15661443

申请日：2017-07-27

Applicant: Japan Display Inc.

Inventor： Yoshihiro WATANABE ,  Yoshikatsu IMAZEKI ,  Yoichi KAMIJO ,  Shuichi OSAWA

IPC: G02F1/1362 ,  G02F1/1339 ,  H05K3/36 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40 ,  G02F1/1333 ,  H05K1/14

CPC classification number: G02F1/136286 ,  G02F1/133345 ,  G02F1/13338 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/133528 ,  G02F1/1339 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/1368 ,  G02F2001/133519 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2201/42 ,  H05K1/115 ,  H05K1/144 ,  H05K3/002 ,  H05K3/0026 ,  H05K3/366 ,  H05K3/4038 ,  H05K2201/041 ,  H05K2201/09036 ,  H05K2201/09827 ,  H05K2201/10136 ,  H05K2203/107

Abstract: According to one embodiment, an electronic apparatus includes a first substrate, a second substrate, and a connecting material. The second substrate includes a second basement and a second conductive layer. The second basement has a third surface opposed to the first conductive layer and a fourth surface and is spaced apart from the first conductive layer. The second substrate has a first hole penetrating the second basement. The first substrate has a second hole. A third opening of the second hole is smaller than a first opening of the first hole. A connecting material connects the first conductive layer and the second conductive layer via the first hole.

公开(公告)号：US09761654B2

公开(公告)日：2017-09-12

申请号：US15208705

申请日：2016-07-13

Applicant: Japan Display Inc.

Inventor： Kazuto Tsuruoka ,  Norio Oku

IPC: H01L29/15 ,  H01L27/32 ,  H01L27/12 ,  G02F1/1345 ,  G09F9/30 ,  H01L23/48

CPC classification number: H01L27/3276 ,  G02F1/1345 ,  G02F2201/42 ,  G09F9/30 ,  H01L23/481 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3297

Abstract: A display device includes a first substrate arranged with a plurality of pixels on a first surface, the plurality of pixels having a display element including a transistor, and a first wiring connected to the transistor, a through electrode arranged in a first contact hole reaching the first wiring from a second surface facing the first surface of the first substrate, a second wiring connected with the through electrode, a first insulation film arranged covering the second wiring on the second surface of the first substrate, and a terminal connected with a second wiring via a second contact hole arranged in the first insulation film.

公开(公告)号：US20170176827A1

公开(公告)日：2017-06-22

申请号：US15364815

申请日：2016-11-30

Applicant: Japan Display Inc.

Inventor： Yasushi KAWATA ,  Takumi Sano

IPC: G02F1/1362 ,  G02F1/1343 ,  G02F1/1333 ,  H01L27/12 ,  G02F1/1339

CPC classification number: G02F1/136227 ,  G02F1/133345 ,  G02F1/1339 ,  G02F1/13394 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/13452 ,  G02F2001/13396 ,  G02F2201/123 ,  G02F2201/42 ,  G02F2202/28 ,  H01L27/124 ,  H01L27/1244

Abstract: According to one embodiment, a display device includes a first substrate including an insulating substrate with a through hole, a first pad electrode disposed above the insulating substrate, and a signal line electrically connected to the first pad electrode, a second substrate disposed to be opposed to the first substrate, a first layer disposed between the first pad electrode and the second substrate, a wiring substrate including a connection line and disposed below the insulating substrate, and a conductive material disposed within the through hole to electrically connect the first pad electrode and the connection line, wherein the through hole is formed in a position overlapping the first layer.

公开(公告)号：US09581870B2

公开(公告)日：2017-02-28

申请号：US12540394

申请日：2009-08-13

Applicant: Fred B. McCormick ,  Sergey A. Lamansky ,  Leslie A. Kreilich ,  Manoj Nirmal

Inventor： Fred B. McCormick ,  Sergey A. Lamansky ,  Leslie A. Kreilich ,  Manoj Nirmal

IPC: H01J1/62 ,  G02F1/1343 ,  H01L51/52 ,  H01L31/0224 ,  H01L51/44

CPC classification number: G02F1/13439 ,  G02F1/133305 ,  G02F1/133345 ,  G02F1/1334 ,  G02F1/167 ,  G02F2001/1676 ,  G02F2201/42 ,  G02F2203/01 ,  H01L31/022466 ,  H01L31/022475 ,  H01L51/442 ,  H01L51/5215 ,  Y02E10/549

Abstract: A conducting film or device multilayer electrode includes a substrate and two transparent or semitransparent conductive layers separated by a transparent or semitransparent intervening layer. The intervening layer includes electrically conductive pathways between the first and second conductive layers to help reduce interfacial reflections occurring between particular layers in devices incorporating the conducting film or electrode.

Abstract translation: 导电膜或器件多层电极包括衬底和由透明或半透明中间层隔开的两个透明或半透明导电层。 中间层包括在第一和第二导电层之间的导电通路，以帮助减少在结合导电膜或电极的器件中在特定层之间发生的界面反射。