Liquid crystal apparatus having an anisotropic conductive layer between
the lead electrodes of the liquid crystal device and the circuit board
    151.
    发明授权
    Liquid crystal apparatus having an anisotropic conductive layer between the lead electrodes of the liquid crystal device and the circuit board 失效
    在液晶装置的引线电极和电路板之间具有各向异性导电层的液晶装置

    公开(公告)号:US4832455A

    公开(公告)日:1989-05-23

    申请号:US94383

    申请日:1987-09-04

    Abstract: A liquid crystal apparatus in which an anisotropic conductive layer made of organic resin containing several electrically conductive particles having substantially identical particle sizes is disposed between lead electrodes of a liquid crystal device and the lead electrodes of a drive circuit board, thermocompression bonding being applied to make the electrically conductive particles in direct contact with both lead electrodes to allow both lead electrodes to be electrically connected with each other. Further, at least one of the lead electrodes of a common electrode in the liquid crystal device and of the circuit board corresponding to the common electrode includes a number of separated electrodes that are spaced apart, and the pitches and widths of the separated electrodes are in the range of .+-.30% around the average values for pitch and width for the separated electrodes.

    Abstract translation: 在液晶装置的引线电极与驱动电路基板的引线电极之间配置有由含有数个具有大致相同粒径的导电性粒子的有机树脂构成的各向异性导电层的液晶装置, 导电颗粒与两个引线电极直接接触,以允许两个引线电极彼此电连接。 此外,液晶装置中的公共电极的引线电极和对应于公共电极的电路板中的至少一个引线电极包括间隔开的多个分离的电极,并且分离的电极的间距和宽度在 围绕分离电极的间距和宽度的平均值的+/- 30%的范围。

    WIRING BOARD AND MANUFACTURING METHOD THEREFOR
    152.
    发明公开

    公开(公告)号:US20240357739A1

    公开(公告)日:2024-10-24

    申请号:US18639407

    申请日:2024-04-18

    Inventor: Tomoyuki Ishii

    Abstract: A wiring board includes: a substrate; a first seed layer provided on the substrate; a first conductive layer provided on the first seed layer; a first insulating layer provided on the first conductive layer; a second seed layer provided on the first insulating layer; and a second conductive layer provided on the second seed layer. An area of the first insulating layer is smaller than an area of the first conductive layer. An area of the second conductive layer is smaller than the area of the first insulating layer. A region of the first insulating layer not overlapping the second conductive layer includes a first region surrounding the second conductive layer and a second region outside the first region. A surface roughness of the second region is larger than a surface roughness of the first region.

    ELECTRONIC DEVICE
    155.
    发明公开
    ELECTRONIC DEVICE 审中-公开

    公开(公告)号:US20240114619A1

    公开(公告)日:2024-04-04

    申请号:US18073592

    申请日:2022-12-02

    CPC classification number: H05K1/113 H05K3/4038 H05K3/4673 H05K2201/0266

    Abstract: An electronic device including an electronic unit and a redistribution layer is disclosed. The electronic unit has connection pads. The redistribution layer is electrically connected to the electronic unit and includes a first insulating layer, a first metal layer and a second insulating layer. The first insulating layer is disposed on the electronic unit and has first openings disposed corresponding to the connection pads. The first metal layer is disposed on the first insulating layer and electrically connected to the electronic unit through the connection pads. The second insulating layer is disposed on the first metal layer. The first insulating layer includes first filler particles, and the second insulating layer includes second filler particles. The first filler particles have a first maximum particle size, the second filler particles have a second maximum particle size, and the second maximum particle size is greater than the first maximum particle size.

    PRINTED WIRING BOARD
    156.
    发明申请

    公开(公告)号:US20180213644A1

    公开(公告)日:2018-07-26

    申请号:US15880670

    申请日:2018-01-26

    Abstract: A printed wiring board includes an interlayer resin insulating layer including resin and inorganic particles, a via conductor formed through the insulating layer, a first conductor layer formed on the first surface of the insulating layer and including a land portion of the via conductor on the first surface, and a second conductor layer formed on second surface of the insulating layer and connected to bottom of the via conductor. The bottom of the via conductor has diameter of 20 to 35 μm, the first conductor layer has thickness of 3 to 12 μm, the insulating layer has thickness of 1 to 15 μm, the second conductor layer has thickness of 1 to 12 μm, and the second conductor and insulating layers are formed such that T1/T2 is 0.06 to 7.00 where T1 represents the thickness of the second conductor layer, and T2 represents the thickness of the insulating layer.

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