公开(公告)号：US20240305184A1

公开(公告)日：2024-09-12

申请号：US18613197

申请日：2024-03-22

Applicant: SCHNEIDER ELECTRIC IT CORPORATION

Inventor： Indra Prakash ,  Roger Franchino ,  Damir Klikic

IPC: H02M1/08 ,  H02M7/00 ,  H02M7/537 ,  H05K1/02 ,  H05K1/18 ,  H05K3/32

CPC classification number: H02M1/08 ,  H02M7/003 ,  H02M7/537 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/32 ,  H05K2201/09227 ,  H05K2201/10015 ,  H05K2201/10166 ,  H05K2201/10522

Abstract: According to one aspect, embodiments of the invention provide an electrical-converter system comprising a printed circuit board including at least a first layer and a second layer, a switching node disposed on the second layer, a first transistor, a second transistor, a third transistor, and a fourth transistor disposed on the first layer, a first conduction path from a source of the first transistor, through the switching node, to a drain of the fourth transistor, the first conduction path having a first length, and a second conduction path from the source of the first transistor, through the switching node, to a drain of the second transistor, the second conduction path having a second length, wherein the first length of the first conduction path is greater than the second length of the second conduction path.

公开(公告)号：US12082342B2

公开(公告)日：2024-09-03

申请号：US17807037

申请日：2022-06-15

Applicant: MACOM Technology Solutions Holdings, Inc.

Inventor： Rathnait Long ,  Richard Allen Cory ,  Gerald Comtois ,  Scott Donahue

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K1/184 ,  H05K1/0224 ,  H05K2201/09227 ,  H05K2201/10984

Abstract: Examples of printed circuit boards (PCBs) with board configuration blocks and board edge projections are described. In one example, a PCB includes a core material and a metal layer comprising a plurality of metal traces on the core material. The plurality of metal traces can include component interconnect traces and a board configuration block. The board configuration block can include a plan diagram for the PCB, an operational diagram for the PCB, or a combination of plan and operational diagrams. In other examples, a PCB can include a core material having a peripheral edge. The peripheral edge can include one or more board edge scheme projections positioned within projection edge regions of the peripheral edge. The scheme projections have a projection shape based on operational characteristics for the PCB. In some cases, the board configuration blocks can be located on the board edge scheme projections.

公开(公告)号：US20240243496A1

公开(公告)日：2024-07-18

申请号：US18154658

申请日：2023-01-13

Applicant: CIENA CORPORATION

Inventor： Russell Mays

IPC: H01R12/57 ,  H01R25/00 ,  H01R43/02 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H01R12/57 ,  H01R25/006 ,  H01R43/0256 ,  H05K1/0228 ,  H05K1/113 ,  H05K1/181 ,  H05K2201/09227 ,  H05K2201/09409 ,  H05K2201/09481 ,  H05K2201/09609 ,  H05K2201/10189 ,  H05K2201/10545

Abstract: Aspects of the subject disclosure may include, for example, a device including a connector having a connector body and one or more rows of pins, where the connector facilitates a pluggable connection to an electrical cable or pluggable transceiver, where at least one of the one or more rows of pins includes a first group of the pins extending in a first direction and a second group of the pins extending in a second, different direction. The device includes a host board having vias, where at least a portion of the first and second groups of pins are connected with a portion of the vias by way of solder joints. Other embodiments are disclosed.

公开(公告)号：US12029631B1

公开(公告)日：2024-07-09

申请号：US17231564

申请日：2021-04-15

Applicant: AlertWet LLC

Inventor： Franklin Edward Ward ,  Kimberly Dawn Gray

IPC: A61F13/42 ,  A61F13/04 ,  A61F13/84 ,  G01N27/22 ,  H05K1/02

CPC classification number: A61F13/42 ,  G01N27/223 ,  H05K1/0228 ,  A61F13/041 ,  A61F2013/424 ,  A61F2013/8482 ,  H05K2201/09227

Abstract: A sensor pad assembly for detecting wetness, the pad assembly comprising a breathable polyethylene base layer, a first carbon black trace printed on a top surface of the base layer in a serpentine pattern, a second carbon black trace printed on the top surface of the base layer in a serpentine pattern that does not overlap the first trace, wherein at least a portion of the second trace is adjacent each portion of the first trace and an absorbing subassembly including non-woven layers that envelope a super absorbent polymer (SAP) material, the absorbing subassembly adhered to the top surface of the base layer over the first and second traces.

公开(公告)号：US12016118B2

公开(公告)日：2024-06-18

申请号：US17760079

申请日：2021-02-26

Applicant: KUPRION INC.

Inventor： Alfred A. Zinn ,  Khanh Nguyen

IPC: H05K1/09 ,  H05K1/03 ,  H05K1/11 ,  H05K1/18 ,  H05K3/10 ,  H05K3/30 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K1/0306 ,  H05K1/092 ,  H05K1/115 ,  H05K1/181 ,  H05K1/183 ,  H05K3/107 ,  H05K3/303 ,  H05K3/4038 ,  H05K3/46 ,  H05K2201/09227 ,  H05K2201/09563

Abstract: Printed circuit boards may be formed using ceramic substrates with high thermal conductivity to facilitate heat dissipation. Metal nanoparticles, such as copper nanoparticles, may be used to form conductive traces and fill through-plane vias upon the ceramic substrates. Multi-layer printed circuit boards may comprise two or more ceramic substrates adhered together, wherein each ceramic substrate has one or more conductive traces defined thereon and the one or more conductive traces are formed through consolidation of metal nanoparticles. The one or more conductive traces in a first ceramic substrate layer are in electrical communication with at least one second ceramic substrate layer adjacent thereto.

公开(公告)号：US11968784B2

公开(公告)日：2024-04-23

申请号：US17763511

申请日：2020-09-23

Applicant: PRODRIVE TECHNOLOGIES INNOVATION SERVICES B.V.

Inventor： Michel Alexander Hagenaar ,  Nilles Henricus Vrijsen ,  Roel Ten Have

IPC: H05K1/18 ,  H01G2/06 ,  H05K1/02

CPC classification number: H05K1/181 ,  H01G2/065 ,  H05K1/0298 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/10015

Abstract: Capacitor assembly, comprising a printed circuit board comprising a first conductive trace and a second conductive trace, and a first row of capacitors comprising a plurality of surface mounted capacitor elements. Each of the plurality of surface mounted capacitor elements comprises a pair of outer electrodes, one of the pair being mounted to the first conductive trace and defining a first junction, and the other one being mounted to the second conductive trace defining a second junction. The first junction and the second junction define a first capacitor longitudinal axis. The first conductive trace has a first current flow direction with a first oblique angle relative to the first capacitor longitudinal axis.

公开(公告)号：US11903138B2

公开(公告)日：2024-02-13

申请号：US17383084

申请日：2021-07-22

Applicant: INTEL CORPORATION

Inventor： Eric Li ,  Kemal Aygun ,  Kai Xiao ,  Gong Ouyang ,  Zhichao Zhang

IPC: H05K1/02 ,  H05K1/16 ,  H05K3/00 ,  H05K3/02 ,  H05K3/46

CPC classification number: H05K3/0026 ,  H05K1/0228 ,  H05K3/027 ,  H05K3/4694 ,  H05K2201/09227 ,  H05K2201/09727 ,  H05K2203/107 ,  H05K2203/1476

Abstract: Fine feature formation techniques for printed circuit boards are described. In one embodiment, for example, a method may comprise fabricating a conductive structure on a low density interconnect (LDI) printed circuit board (PCB) according to an LDI fabrication process and forming one or more fine conductive features on the LDI PCB by performing a fine feature formation (FFF) process, the FFF process to comprise removing conductive material of the conductive structure along an excision path to form a fine gap region within the conductive structure. Other embodiments are described and claimed.

公开(公告)号：US11839018B2

公开(公告)日：2023-12-05

申请号：US17427110

申请日：2020-12-17

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Wenxiao Niu ,  Xinpeng Wang ,  Hengzhen Liang ,  Xiaolong Zhu ,  Lianbin Liu

IPC: H05K1/18 ,  H05K1/02 ,  G06F3/041 ,  G06F3/044 ,  H10K59/40 ,  H10K59/131

CPC classification number: H05K1/0218 ,  G06F3/04164 ,  H05K1/0281 ,  H05K1/189 ,  G06F3/0412 ,  G06F3/0446 ,  H05K2201/0715 ,  H05K2201/09027 ,  H05K2201/09036 ,  H05K2201/09227 ,  H05K2201/09245 ,  H05K2201/09509 ,  H05K2201/10128 ,  H05K2201/10189 ,  H05K2201/2009 ,  H10K59/131 ,  H10K59/40

Abstract: A flexible printed circuit board and a display touch apparatus are provided. The flexible printed circuit board includes a binding terminal region, a first circuit region and a second circuit region; the binding terminal region includes multiple terminals, the first circuit region includes a driver circuit, multiple first signal lines, multiple second signal lines, and multiple third signal lines, and the second circuit region includes an external connector; first ends of the multiple first signal lines, the multiple second signal lines and the multiple third signal lines are respectively connected to the terminals of the binding terminal region; second ends of the multiple first signal lines and the multiple second signal lines are respectively connected to the driver circuit; and second ends of the multiple third signal lines are connected to the connector.

公开(公告)号：US11798873B2

公开(公告)日：2023-10-24

申请号：US16755660

申请日：2018-10-05

Applicant: VITESCO TECHNOLOGIES GMBH

Inventor： Detlev Bagung ,  Thomas Riepl ,  Daniela Wolf ,  Christina Quest-Matt

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H05K1/02 ,  H05K1/11

CPC classification number: H01L23/49838 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H05K1/0206 ,  H05K1/111 ,  H01L2224/48227 ,  H05K2201/09227 ,  H05K2201/10734

Abstract: A semiconductor assembly includes a semiconductor component having a redistribution substrate with a top side, an underside and a semiconductor chip on the top side. Contact connection pads for connection to contact pads of the chip are on the top side of the substrate. External contact pads on the underside are electrically connected to the contact connection pads by conductor tracks. The external contact pads are at a greater distance from one another in a first region than a second region of the underside. The semiconductor component is on a printed circuit board. Contact pads corresponding to the external contacts are on a top side of the printed circuit board and are at a greater distance from one another in a first region than a second region of the top side. Through holes are formed between the contact pads in the first region of the printed circuit board.

公开(公告)号：US11778731B2

公开(公告)日：2023-10-03

申请号：US17503988

申请日：2021-10-18

Applicant: Raytheon Company

Inventor： Thanh Tran ,  David G. Haedge ,  Alton Moore ,  Paul Ingerson

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/0228 ,  H05K1/0245 ,  H05K1/112 ,  H05K1/114 ,  H05K1/0251 ,  H05K1/181 ,  H05K2201/09227 ,  H05K2201/09636 ,  H05K2201/09672 ,  H05K2201/09718

Abstract: A multi-layer printed circuit board having a first landing pad in a first layer and along a first axis arranged to receive a positive signal and a second landing pad in the first layer and along a second axis that is spaced away from the first axis longitudinally in the first layer and where the second landing pad arranged to receive a negative signal. A first buried in a second layer and along the first axis is spaced away from the first landing pad along the first axis. A second buried in the second layer and along the second axis is spaced away from the second landing pad along the second axis. A first signal connector provides a first electrical connection between the first landing pad and the second buried via and a second signal connector provides a second electrical connection between the second landing pad and the first buried via.