公开(公告)号：US20020012096A1

公开(公告)日：2002-01-31

申请号：US09853083

申请日：2001-05-10

Inventor： Kenji Uchiyama

IPC: G02F001/13

CPC classification number: G02F1/13452 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H05K1/0269 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/068 ,  H05K2201/09427 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2203/166 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A substrate 6a having terminals 9 thereon is bonded to a wiring board 11 having output terminals 11c thereon through an ACP 20. The pitch P2 of the output terminals 11c is different from the pitch P1 of the terminals 9 taking into account deformation of the substrate 6a or the wiring board 11 during bonding. When the substrate 6a or the wiring board 11 deforms during the bonding, the both terminals are connected with the pitch P1null of the terminals 9 and the pitch P2null of the output terminals 11c becoming approximately equal to each other.

Abstract translation: 其上具有端子9的基板6a通过ACP 20与其上具有输出端子11c的布线板11接合。考虑到基板6a的变形，输出端子11c的间距P2与端子9的间距P1不同 或布线基板11。 当接合时基板6a或布线基板11发生变形时，两端子与端子9的间距P1'和输出端子11c的间距P2'大致相等。

公开(公告)号：US06332269B1

公开(公告)日：2001-12-25

申请号：US09466429

申请日：1999-12-17

Applicant: Darryl L. Gamel ,  Kreg W. Hines

Inventor： Darryl L. Gamel ,  Kreg W. Hines

IPC: H05K330

CPC classification number: H05K3/303 ,  H05K1/0269 ,  H05K13/022 ,  H05K2201/09918 ,  H05K2201/10689 ,  H05K2203/0195 ,  H05K2203/166 ,  Y02P70/613 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49137 ,  Y10T29/49144 ,  Y10T29/53022 ,  Y10T29/53052 ,  Y10T29/53091 ,  Y10T29/53174 ,  Y10T29/53178 ,  Y10T29/53183 ,  Y10T29/53261

Abstract: A method of verifying a predetermined lead alignment of a component having a physical asymmetry corresponding to an alignment of the leads is provided. The method includes placing the component in a recess in a surface of a nest, wherein the recess corresponds to and mates with the physical asymmetry on the component and detecting whether the physical asymmetry has mated with the recess.

Abstract translation: 提供一种验证具有对应于引线的对准的物理不对称性的部件的预定引线对准的方法。 该方法包括将组件放置在嵌套的表面中的凹槽中，其中凹部对应于组件上的物理不对称性并且检测物理不对称性是否与凹部配合。

公开(公告)号：US06283681B1

公开(公告)日：2001-09-04

申请号：US09580304

申请日：2000-05-26

Applicant: Angelo Raiteri

Inventor： Angelo Raiteri

IPC: B23B3500

CPC classification number: B23Q3/186 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0047 ,  H05K2201/09918 ,  Y10T83/6568 ,  Y10T408/03 ,  Y10T408/08 ,  Y10T408/21 ,  Y10T408/52 ,  Y10T408/5617 ,  Y10T409/300896 ,  Y10T409/303752 ,  Y10T409/30616

Abstract: The workpiece or pack of printed circuit boards is fitted to a clamping fixture carried by the table and is machined by a machining head; the head and the table being movable with respect to each other along two coordinate X, Y axes. The aligning method includes the steps of providing the pack with two locating holes; fitting the pack to the fixture; determining the distances between the real positions of the holes and two reference positions; and moving the pack on the fixture to eliminate the distances. The aligning device has an optoelectronic sensor carried by the head to determine the real position of each hole; and a number of motors controlled on the basis of the real position of each hole to move a locating member for locating a first pin on the pack, and to move one bar of a pair of bars for clamping the other pin on the pack.

Abstract translation: 印刷电路板的工件或包装被安装在由工作台承载的夹具上，并由加工头加工; 头部和桌子可沿两个坐标X，Y轴线相对于彼此移动。 对准方法包括以下步骤：为包装提供两个定位孔; 将包装装配到夹具上; 确定孔的实际位置和两个参考位置之间的距离; 并将包装移动到夹具上以消除距离。 对准装置具有由头承载的光电传感器，以确定每个孔的实际位置; 以及基于每个孔的实际位置控制的多个电动机，以移动用于将第一销定位在包装上的定位构件，并且移动一对杆的一个杆以将另一个销夹紧在包装上。

公开(公告)号：US6044549A

公开(公告)日：2000-04-04

申请号：US164268

申请日：1998-10-01

Applicant: Richard Kubin

Inventor： Richard Kubin

IPC: H05K1/02 ,  H05K3/34

CPC classification number: H05K3/3452 ,  H05K1/0269 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/09918 ,  H05K2203/166 ,  Y10T29/21 ,  Y10T29/49131 ,  Y10T29/49144

Abstract: In a method of assembling an electronic component onto a substrate, a fiducial is defined by a solder mask positioned upon the substrate. A fiducial-defining window in the mask has a base of the window completely provided with a material of different light-reflecting quality than the mask surface. This provides for the peripheral edge of the window, i.e. the mask, to be the edge of the fiducial. Windows in the mask which expose terminal pads upon the substrate and fixed in position relative to edges of the fiducial and both these windows and the fiducial are determined by the mask. Surface mount components are then located upon the substrate relative to the window positions and not relative to the terminal pad positions. This process reduces the number of incorrect connections of terminals of components to terminal pads.

Abstract translation: 在将电子部件组装到基板上的方法中，通过位于基板上的焊接掩模限定基准。 掩模中的基准定义窗口具有窗口的底部，其完全具有与掩模表面不同的光反射质量的材料。 这提供了窗口的外围边缘，即掩模，作为基准的边缘。 通过掩模确定掩模中的窗口，其将端子衬垫暴露在衬底上并相对于基准的边缘固定在适当位置，并且这两个窗口和基准点都由掩模确定。 然后表面安装部件相对于窗口位置而不是相对于端子焊盘位置位于基板上。 该过程减少了组件端子到端子焊盘的不正确连接的数量。

公开(公告)号：US6031590A

公开(公告)日：2000-02-29

申请号：US10139

申请日：1998-01-21

Applicant: Seong Jin Kim

Inventor： Seong Jin Kim

IPC: G02F1/1345 ,  G02F1/13 ,  H01L21/60 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  G02F1/1333

CPC classification number: H01L24/83 ,  G02F1/13452 ,  H01L24/29 ,  H05K3/323 ,  H01L2224/2929 ,  H01L2224/29399 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/14 ,  H05K2201/09909 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2203/0156 ,  H05K2203/0191 ,  H05K2203/0338 ,  H05K2203/0522 ,  H05K2203/166 ,  H05K3/3452 ,  H05K3/361

Abstract: A structure and method of mounting a driver IC using an anisotropic conductive film (ACF) in a liquid crystal display device is disclosed. ACFs are used in bonding a FPC (Flexible Printed Circuit) and in a COG (Chip on Glass) process at the same time. A film according to the present invention comprises a support film, a COG ACF adhered on one portion of the support film and a FPC ACF adhered on the other portion of the support film. Using the film disclosed in the present invention, the manufacturing process of the LCD panel becomes simpler and easier.

Abstract translation: 公开了一种在液晶显示装置中使用各向异性导电膜（ACF）安装驱动IC的结构和方法。 ACF用于同时粘合FPC（柔性印刷电路）和COG（玻璃上芯片）工艺。 根据本发明的膜包括支撑膜，粘附在支撑膜的一部分上的COG ACF和粘附在支撑膜的另一部分上的FPC ACF。 使用本发明所公开的薄膜，LCD面板的制造过程变得简单和容易。

公开(公告)号：US5993946A

公开(公告)日：1999-11-30

申请号：US648915

申请日：1996-05-16

Applicant: Tatsuo Inoue

Inventor： Tatsuo Inoue

IPC: H01L23/12 ,  H01L23/538 ,  H05K1/02 ,  H05K3/30 ,  H05K3/46 ,  B32B3/00

CPC classification number: H05K1/0269 ,  H01L23/5386 ,  H01L2924/0002 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K3/303 ,  H05K3/4629 ,  H05K3/467 ,  Y10S428/901 ,  Y10T428/24926

Abstract: A lattice of a wiring or terminal pattern is varied at areas on a wiring board. The spacing of the wiring lattice is reduced only in a predetermined area for a device having many terminals. An alignment pattern is provided in the predetermined area. The spacing of the wiring lattice in the central portion of the wiring board may be the finest and may get gradually coarser toward the peripheral portion of the wiring lattice.

Abstract translation: 接线板或端子图案的格子在布线板上的区域变化。 只有在具有许多端子的装置的预定区域中，布线晶格的间距减小。 在预定区域中设置对准图案。 配线基板的中央部的配线格架的间隔可以是最细的，并且可能逐渐变粗糙地朝向布线晶格的周边部分。

公开(公告)号：US5943217A

公开(公告)日：1999-08-24

申请号：US873182

申请日：1997-06-11

Applicant: Nobuaki Hashimoto

Inventor： Nobuaki Hashimoto

IPC: H01L21/60 ,  H05K1/02 ,  H05K3/24 ,  H05K3/28 ,  H05K3/30 ,  H05K3/34 ,  H05K3/46 ,  H05K1/03 ,  H05K1/11 ,  H05K7/02 ,  H05K7/06

CPC classification number: H05K3/3457 ,  H05K1/0269 ,  H05K3/3421 ,  H05K3/3489 ,  H01L2924/0002 ,  H05K2201/09781 ,  H05K2201/09909 ,  H05K2201/09918 ,  H05K2201/10681 ,  H05K2201/10689 ,  H05K2201/10977 ,  H05K2203/0143 ,  H05K2203/0195 ,  H05K2203/0278 ,  H05K2203/0315 ,  H05K2203/043 ,  H05K2203/0485 ,  H05K2203/0588 ,  H05K2203/161 ,  H05K3/303 ,  H05K3/3452 ,  H05K3/46 ,  Y02P70/613

Abstract: A printed circuit board is provided to which a device such as a tape carrier package having a multiplicity of leads arranged with a small pitch is connected by a local heating method using a bonding tool. The upper surfaces of solder layers provided on lands formed on the printed circuit board are flattened prior to leads of an electronic part to be mounted being placed on the solder layers. The leads are soldered to the lands by being pressed and heated with the bonding tool. At least a region of the printed circuit board corresponding to the bottom surface of the bonding tool has a height lower than that of the leads superposed on the lands, so that the desired parallelism of the bottom surface of the bonding tool with respect to the printed circuit board is maintained.

Abstract translation: 提供一种印刷电路板，通过使用接合工具的局部加热方法连接诸如具有以小间距布置的多个引线的带状载体封装的装置。 在形成在印刷电路板上的焊盘上的焊料层的上表面在被安装在焊料层上的电子部件的引线之前变平。 用焊接工具将引线焊接到土地上。 对应于接合工具的底面的印刷电路板的至少一个区域的高度低于重叠在焊盘上的引线的高度，使得焊接工具的底面相对于印刷的期望的平行度 维护电路板。

公开(公告)号：US5922168A

公开(公告)日：1999-07-13

申请号：US725425

申请日：1996-10-03

Applicant: Gordon O. Zablotny ,  James W. Horner

Inventor： Gordon O. Zablotny ,  James W. Horner

IPC: H01G4/30 ,  H01L21/822 ,  H01L27/04 ,  H01L41/24 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00 ,  H05K3/46 ,  B32B31/00

CPC classification number: H01G4/308 ,  H01L41/273 ,  H01L41/297 ,  H05K3/4638 ,  H05K1/0269 ,  H05K1/0306 ,  H05K2201/09918 ,  H05K2203/0156 ,  H05K2203/0228 ,  H05K2203/065 ,  H05K2203/066 ,  H05K2203/166 ,  H05K3/0052 ,  H05K3/4629 ,  Y10T156/13 ,  Y10T156/1317 ,  Y10T156/1322 ,  Y10T156/133 ,  Y10T29/5122 ,  Y10T29/5124 ,  Y10T29/5135 ,  Y10T29/5136 ,  Y10T29/5303 ,  Y10T29/53048 ,  Y10T29/534 ,  Y10T29/53978

Abstract: An apparatus for automatically making a laminated electrical or electronic device has a series of processing stations including an inspection station for inspecting the quality of printing at a series of indexed segments on a ceramic coated, continuous tape, a stack and tack station at which sequential segments of the tape are cut and stacked on top of each other to form a stack having a selected number of layers, a lamination station in which the stacked layers are laminated together, and a cutting station at which the stack is cut into a plurality of individual chips, a tape feed mechanism for indexing the tape segments sequentially through the inspection station and stack and tack station, and a drive mechanism for moving a stack from the stack and tack station through the lamination station and cutting station.

Abstract translation: 用于自动制作层压电气或电子设备的装置具有一系列处理站，包括检查站，用于检查陶瓷涂布的连续带上的一系列索引段上的打印质量， 的带子被切割并堆叠在彼此的顶部上以形成具有选定数量层的叠层，层压站层叠在一起的堆叠层以及将堆叠切割成多个单独的切割站 芯片，用于将带段顺序地通过检查站和堆叠和粘结站分度的带进给机构，以及用于通过层压站和切割站从堆叠和粘结站移动堆叠的驱动机构。

公开(公告)号：US5794526A

公开(公告)日：1998-08-18

申请号：US835607

申请日：1997-04-09

Applicant: Charles C. Raney

Inventor： Charles C. Raney

IPC: B26D5/00 ,  B26D7/01 ,  B26D7/26 ,  B26F1/40 ,  B30B15/30 ,  H05K1/02 ,  H05K3/00 ,  B30B15/02

CPC classification number: B26D7/2628 ,  B26D7/015 ,  H05K3/0008 ,  B26D2007/2607 ,  H05K1/0269 ,  H05K2201/09918 ,  H05K2203/0108 ,  H05K2203/1545 ,  H05K3/005 ,  Y10S100/918 ,  Y10T83/05 ,  Y10T83/538

Abstract: In a die cutting press for elongated material, a registration system includes a die unit that is shiftable along the path of travel of the material, along a direction of travel transverse to the path of travel, and about a reference axis perpendicular to a plane containing the material. At least one camera is provided for receiving images from the desired locations that are occupied by indicia on the material when defined areas of the material are in a predetermined relationship relative to the die unit. Reference image data representative of the desired locations of the indicia relative to the die unit is produced so that a comparison can be made between the reference image data and the actual positions of the indicia. This permits a controller to change the position of the die unit relative to the material to compensate for the difference in position between the indicia within the image and the desired locations of the indicia so that one of the defined areas of the material is positioned in the desired predetermined relationship with the die unit.

Abstract translation: 在用于细长材料的模切机中，配准系统包括：模具单元，该模具单元可沿着材料的行进路径沿横向于行进路径的行进方向以及垂直于包含 材料。 提供至少一个照相机用于在材料的限定区域相对于模具单元处于预定关系时，从所述材料上的标记占据的期望位置接收图像。 产生表示标记相对于模具单元的期望位置的参考图像数据，使得可以在参考图像数据与标记的实际位置之间进行比较。 这允许控制器相对于材料改变模具单元的位置，以补偿图像中的标记与标记的期望位置之间的位置差异，使得材料的限定区域中的一个位于 期望与模具单元的预定关系。

公开(公告)号：US5768107A

公开(公告)日：1998-06-16

申请号：US666811

申请日：1996-06-19

Applicant: Toshimichi Ouchi ,  Masanori Takahashi

Inventor： Toshimichi Ouchi ,  Masanori Takahashi

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/36 ,  H05K3/46 ,  H05K1/14

CPC classification number: H05K1/0269 ,  H05K3/4638 ,  H05K1/0266 ,  H05K2201/0969 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2203/0315 ,  H05K3/361

Abstract: An electric circuit substrate having a multilayer structure is constituted from at least three wiring layers including an outermost wiring layer, at least one first inner wiring layer disposed under the outermost wiring layer, and a second inner wiring layer disposed under the at least one first inner wiring layer, each provided with a prescribed conductor pattern, respectively. In the multilayer structure, the outermost wiring layer has an alignment mark, the above-mentioned at least one first inner wiring layer has a blank portion free from its conductor pattern in a position immediately under the alignment mark, and the second inner wiring layer has an entire solid portion of its conductor pattern in a position immediately under the blank portion. The above multilayer structure including the alignment mark is effective in preventing recognition error or recognition failure of the alignment mark, thus allowing accurate positioning of the electric circuit substrate.

Abstract translation: 具有多层结构的电路基板由至少三个布线层构成，所述布线层包括最外布线层，设置在最外布线层下方的至少一个第一内布线层和设置在所述至少一个第一内层 布线层，分别设置有规定的导体图案。 在多层结构中，最外面的布线层具有对准标记，上述至少一个第一内部布线层在正好位于对准标记的正下方具有没有导体图案的空白部分，第二内部布线层具有 其导体图案的整个实心部分处于空白部分正下方的位置。 包括对准标记的上述多层结构对于防止识别错误或对准标记的识别失败是有效的，因此允许电路基板的精确定位。