公开(公告)号：US3465091A

公开(公告)日：1969-09-02

申请号：US3465091D

申请日：1967-02-24

Applicant: TEXAS INSTRUMENTS INC

Inventor： BRADHAM ALLEN C

IPC: H05K1/00 ,  H05K3/06 ,  H05K3/40 ,  H05K1/02

CPC classification number: H05K3/4038 ,  H05K1/0287 ,  H05K1/0289 ,  H05K1/0293 ,  H05K3/064 ,  H05K3/4046 ,  H05K2201/0305 ,  H05K2201/09609 ,  H05K2201/10234 ,  H05K2203/107 ,  H05K2203/1105 ,  H05K2203/128 ,  H05K2203/173 ,  H05K2203/175

公开(公告)号：US3300686A

公开(公告)日：1967-01-24

申请号：US29860363

申请日：1963-07-30

Applicant: IBM

Inventor： JOHNSON ALFRED H ,  MCCONNELL WILLIAM R ,  SCHULZ PETER R

IPC: G06F1/18 ,  H05K1/14

CPC classification number: H05K1/14 ,  G06F1/18 ,  H05K2201/044 ,  H05K2201/09609 ,  H05K2201/10325 ,  H05K2201/10704

公开(公告)号：US12101874B2

公开(公告)日：2024-09-24

申请号：US17962286

申请日：2022-10-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunseok Hong

IPC: H05K1/02

CPC classification number: H05K1/0219 ,  H05K1/0278 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/09609

Abstract: A rigid flexible printed circuit board (RFPCB) may include: a first base conductive layer; a first rigid conductive layer spaced apart from the first base conductive layer in a first direction; a second rigid conductive layer spaced apart from the first base conductive layer in the first direction and spaced apart from the first rigid conductive layer in a second direction intersecting the first direction; a base cover layer spaced apart from the first base conductive layer in the first direction and positioned closer to the first base conductive layer than to the first rigid conductive layer and the second rigid conductive layer; a transmission line positioned between the first base conductive layer and the base cover layer; and a dummy metal layer disposed on the base cover layer, positioned between the first rigid conductive layer and the second rigid conductive layer, and overlapping the transmission line in the first direction.

公开(公告)号：US12087990B2

公开(公告)日：2024-09-10

申请号：US17046840

申请日：2018-04-13

Applicant: SAAB AB

Inventor： Sten Gunnarsson

IPC: H01P5/107 ,  H05K1/02 ,  H05K1/14

CPC classification number: H01P5/107 ,  H05K1/0225 ,  H05K1/0246 ,  H05K1/144 ,  H05K2201/042 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/10098

Abstract: A waveguide launch system configured for translating radio frequency signal waves is provided. The system comprises a first printed circuit board lamina comprising an electrically conductive ground member and configured for attachment of a separate waveguide element, having a first cross-section area, thereto. A second printed circuit board lamina comprising an electrically conductive backshort cover configured to reflect the RF signal waves is bonded to a first printed circuit board lamina. An electrically conductive barrier arrangement extends through the second printed circuit board lamina. The electrically conductive barrier arrangement and the electrically conductive backshort cover form an integrated electrically conductive backshort volume of an integrated backshort having a second cross-section area. The second cross-section area is smaller than the first cross-section area.

公开(公告)号：US12004288B2

公开(公告)日：2024-06-04

申请号：US17184793

申请日：2021-02-25

Applicant: Teradyne, Inc.

Inventor： Andrew Westwood

IPC: G01R31/00 ,  G01R1/04 ,  G01R31/28 ,  H01P3/08 ,  H05K1/02

CPC classification number: H05K1/0222 ,  G01R1/0433 ,  G01R1/0466 ,  G01R1/0483 ,  G01R31/2886 ,  H01P3/08 ,  H05K1/0251 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K2201/09609 ,  H05K2201/09754 ,  H05K2201/09809

Abstract: An example printed circuit board (PCB) includes a substrate having layers of a dielectric material, where the layers of dielectric material include a first layer and a second layer; a conductive trace that is between the first layer and the second layer and that is parallel to the first layer and the second layer along at least part of a length of the conductive trace; and a conductive via that extends at least part-way through the layers of dielectric material and that connects electrically to the conductive trace, where the conductive via is configured also to connect electrically to a signal input to receive or to transmit a signal that has a center frequency span.

公开(公告)号：US20240008178A1

公开(公告)日：2024-01-04

申请号：US18253892

申请日：2021-10-29

Applicant: NITTO DENKO CORPORATION

Inventor： Shusaku SHIBATA ,  Takahiro IKEDA ,  Teppei NIINO

IPC: H05K1/11 ,  H05K3/44

CPC classification number: H05K1/113 ,  H05K3/44 ,  H05K2201/09481 ,  H05K2201/09554 ,  H05K2201/09618 ,  H05K2201/09609 ,  H05K2201/0979 ,  H05K1/056

Abstract: A wiring circuit board includes a metal supporting board; an insulating layer; and a conductive layer in this order in a thickness direction. The conductive layer includes a terminal portion, and a tail line portion extending from the terminal portion. The terminal portion has a via portion that penetrates the insulating layer in the thickness direction and is connected to the metal supporting board. The tail line portion has a base end portion that has a width different from a width of the terminal portion in a direction orthogonal to the extending direction of the tail line portion and that is connected with the terminal portion; and a second via portion that penetrates the insulating layer in the thickness direction and that is connected to the metal supporting board.

公开(公告)号：US20230269862A1

公开(公告)日：2023-08-24

申请号：US18308267

申请日：2023-04-27

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wenliang Li ,  Yongwei Chen ,  Xusheng Liu ,  Zhong Yan ,  Zewen Wang

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0225 ,  H05K1/116 ,  H05K2201/09609 ,  H05K2201/096

Abstract: A printed circuit board includes a plurality of layer structures disposed in a stacked manner, and the printed circuit board has a disposing face. A differential pair unit and a shielding structure for shielding the differential pair unit are disposed on the disposing face. The differential pair unit includes two signal via holes, each signal via hole passes through the plurality of layer structures, and an anti-pad corresponding to each signal via hole is disposed on a ground layer through which the signal via hole passes. A part of metal of a ground layer is spaced between two anti-pads. Each signal corresponds to one anti-pad, and a ground layer is spaced between anti-pads.

公开(公告)号：US20230266363A1

公开(公告)日：2023-08-24

申请号：US18017128

申请日：2021-07-28

Applicant: KYOCERA Corporation

Inventor： Hitoshi TEGA

IPC: G01R1/073 ,  H05K1/02 ,  H05K1/11

CPC classification number: G01R1/07342 ,  H05K1/0298 ,  H05K1/119 ,  H05K1/025 ,  H05K2201/09609 ,  H05K2201/09672 ,  H05K2201/09445

Abstract: A circuit board includes an insulating substrate including a wiring conductor and a first resin substrate that is made of a resin different from the insulating substrate and is laminated on the insulating substrate. The first resin substrate has a plurality of internal conductors located from a surface thereof facing the insulating substrate to a surface on a side opposite to the insulating substrate. Each of the plurality of internal conductors includes a part that is inclined with respect to a perpendicular to the surface facing the insulating substrate. Intervals at which the plurality of internal conductors are located on the side opposite to the insulating substrate are narrower than intervals at which the plurality of internal conductors are located on an insulating substrate side.

公开(公告)号：US11729898B1

公开(公告)日：2023-08-15

申请号：US17831859

申请日：2022-06-03

Applicant: TE Connectivity Solutions GmbH

Inventor： Justin Dennis Pickel ,  Margaret Mahoney Fernandes ,  Timothy Robert Minnick

IPC: H05K1/11 ,  H05K1/02 ,  H01R12/58 ,  H05K1/18

CPC classification number: H05K1/0222 ,  H05K1/116 ,  H01R12/58 ,  H05K1/18 ,  H05K2201/09481 ,  H05K2201/09609 ,  H05K2201/09772 ,  H05K2201/10189 ,  H05K2201/10901

Abstract: A printed circuit board includes a layered substrate having a plurality of layers having an electrical connector footprint configured to receive an electrical connector. The printed circuit board includes pair anti-pads passing through the layered substrate around pairs of signal vias. The printed circuit board includes ground vias passing through the layered substrate. The ground vias are configured to receive ground pins of the electrical connector. The ground vias are located outside of the pair anti-pads. The printed circuit board includes SI vias passing through the layered substrate. The SI vias form an SI fence surrounding the corresponding pair anti-pad.

公开(公告)号：US11665820B2

公开(公告)日：2023-05-30

申请号：US17536321

申请日：2021-11-29

Applicant: QING DING PRECISION ELECTRONICS (HUAIAN) CO.,LTD ,  Avary Holding (Shenzhen) Co., Limited.

Inventor： Man-Zhi Peng ,  Rui-Wu Liu ,  Ming-Jaan Ho

IPC: H05K1/16 ,  H05K3/14 ,  H01L23/13 ,  H01L23/60 ,  H01L23/488 ,  H05K1/11 ,  H05K3/00

CPC classification number: H05K1/112 ,  H05K3/0014 ,  H05K3/0052 ,  H05K1/119 ,  H05K3/0029 ,  H05K3/0038 ,  H05K2201/09118 ,  H05K2201/09445 ,  H05K2201/09609 ,  H05K2201/09672 ,  H05K2203/0169

Abstract: Disclosure provides an adapter board and a method for making the adapter board, which includes providing a mold in which a plurality of first fixing plates and second fixing plates are provided, providing a plurality of wires sequentially passed through the plurality of first fixing plates and the second fixing plate, injecting a non-conductive material into the cavity to form a body, and cutting the body along both sides of the first fixing plates and the second fixing plates to obtain a plurality of board bodies. The first fixing plates are provided with a plurality of first fixing holes, and the second fixing plates are provided with a plurality of second fixing holes. The board body includes a first surface and a second surface. A plurality of first connection pads are formed on the first surface, and a plurality of second connection pads are formed on the second surface.