公开(公告)号：US20130296491A1

公开(公告)日：2013-11-07

申请号：US13801710

申请日：2013-03-13

Applicant: Yan XIA ,  Benjamin R. SVEINBJORNSSON ,  Robert H. GRUBBS ,  Raymond WEITEKAMP ,  Garrett M. MIYAKE ,  Victoria PIUNOVA ,  Christopher Scot DAEFFLER

Inventor： Yan XIA ,  Benjamin R. SVEINBJORNSSON ,  Robert H. GRUBBS ,  Raymond WEITEKAMP ,  Garrett M. MIYAKE ,  Victoria PIUNOVA ,  Christopher Scot DAEFFLER

IPC: C08F293/00 ,  C08F299/00

CPC classification number: C08G61/124 ,  B81C2201/0149 ,  B82Y40/00 ,  C08F222/04 ,  C08F222/40 ,  C08F232/08 ,  C08F293/00 ,  C08F299/00 ,  C08G61/08 ,  C08G81/00 ,  C08G2261/126 ,  C08G2261/128 ,  C08G2261/1426 ,  C08G2261/146 ,  C08G2261/148 ,  C08G2261/149 ,  C08G2261/3241 ,  C08G2261/3324 ,  C08G2261/418 ,  C08G2261/74

Abstract: The invention provides a class of wedge-type block copolymers having a plurality of chemically different blocks, at least a portion of which incorporates a wedge group-containing block providing useful properties. For example, use of one or more wedge group-containing blocks in some block copolymers of the invention significantly inhibits chain entanglement and, thus, the present block copolymers materials provide a class of polymer materials capable of efficient molecular self-assembly to generate a range of structures, such as periodic nanostructures and microstructures. Materials of the present invention include copolymers having one or more wedge group-containing blocks, and optionally for some applications copolymers also incorporating one or more polymer side group-containing blocks. The present invention also provides useful methods of making and using wedge-type block copolymers.

Abstract translation: 本发明提供了一类具有多个化学上不同的嵌段的楔形嵌段共聚物，其至少一部分包含提供有用特性的含楔基团的嵌段。 例如，在本发明的一些嵌段共聚物中使用一个或多个含楔基团的嵌段显着抑制链缠结，因此本发明的嵌段共聚物材料提供了能够有效分子自组装以产生范围的一类聚合物材料 的结构，如周期性纳米结构和微结构。 本发明的材料包括具有一个或多个含楔基团的嵌段的共聚物，并且任选地用于某些应用也包含一个或多个含聚合物侧基的嵌段的共聚物。 本发明还提供制备和使用楔形嵌段共聚物的有用方法。

公开(公告)号：US08562844B2

公开(公告)日：2013-10-22

申请号：US13157168

申请日：2011-06-09

Applicant: Dan B. Millward

Inventor： Dan B. Millward

IPC: H01L21/302 ,  B81C1/00

CPC classification number: C23F1/02 ,  B05D3/00 ,  B05D5/00 ,  B81C1/00031 ,  B81C2201/0149 ,  B81C2201/0198 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/3081 ,  H01L21/3083 ,  H01L21/3086 ,  Y10S438/947

Abstract: Block copolymers can be self-assembled and used in methods as described herein for sub-lithographic patterning, for example. The block copolymers can be diblock copolymers, triblock copolymers, multiblock copolymers, or combinations thereof. Such methods can be useful for making devices that include, for example, sub-lithographic conductive lines.

公开(公告)号：US08551566B2

公开(公告)日：2013-10-08

申请号：US12707129

申请日：2010-02-17

Applicant: Theodore H. Fedynyshyn ,  Richard Kingsborough

Inventor： Theodore H. Fedynyshyn ,  Richard Kingsborough

IPC: B05D3/00 ,  B05D3/06

CPC classification number: G03F7/165 ,  B81C1/00031 ,  B81C2201/0149 ,  B81C2201/0198 ,  G03F7/0755 ,  G03F7/265 ,  H01L21/0337

Abstract: Methods of directing assembly of materials using a surface-modified substrate are disclosed. A modified surface is created on a substrate by applying a first surface agent to the substrate. Energy is applied to the modified surface to form an imaged surface having an imaged portion and a non-imaged portion. The imaged portion is characterized by a surface energy that is different from the surface energy of the non-imaged portion. For example, the applied energy can remove at least a portion of an attached surface agent from the imaged portion to modify the surface energy. In some preferred embodiments the energy also modifies the surface agent without causing oxidation. To avoid oxidation, for example, the surface modification and/or energy appliement can take place in a low oxygen environment (e.g., having an oxygen content lower than that present in about 0.01 Torr of air). The imaged surface can then be exposed to a self assembling material, such as a block copolymer, such that the surface can direct assembly of the self assembling material by preferential attachment of certain moieties of the block copolymer to imaged or non-imaged portions of the surface in order to form a selected pattern.

Abstract translation: 公开了使用表面改性基材引导材料组装的方法。 通过向基材施加第一表面剂，在基材上形成改性表面。 将能量施加到改性表面以形成具有成像部分和非成像部分的成像表面。 成像部分的特征在于与非成像部分的表面能不同的表面能。 例如，施加的能量可以从成像部分去除附着的表面剂的至少一部分，以改变表面能。 在一些优选的实施方案中，能量还可以改变表面剂而不引起氧化。 为了避免氧化，例如，表面改性和/或能量施加可以在低氧环境中发生（例如，氧含量低于大约0.01Torr空气中的氧含量）。 成像的表面然后可以暴露于自组装材料，例如嵌段共聚物，使得表面可以通过优先将嵌段共聚物的某些部分附着到成像或非成像部分上来引导自组装材料的组装 表面以形成选定的图案。

公开(公告)号：US20130209757A1

公开(公告)日：2013-08-15

申请号：US13761324

申请日：2013-02-07

Applicant: Carlton Grant Willson ,  William J. Durand ,  Christopher John Ellison ,  Christopher M. Bates ,  Takehiro Seshimo ,  Julia Cushen ,  Logan J. Santos ,  Leon Dean ,  Erica L. Rausch

Inventor： Carlton Grant Willson ,  William J. Durand ,  Christopher John Ellison ,  Christopher M. Bates ,  Takehiro Seshimo ,  Julia Cushen ,  Logan J. Santos ,  Leon Dean ,  Erica L. Rausch

IPC: C23C16/44 ,  B29C43/32

CPC classification number: C23C16/44 ,  B29C43/32 ,  B81C1/00031 ,  B81C2201/0149 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  Y10S977/788 ,  Y10S977/809 ,  Y10S977/811 ,  Y10S977/839 ,  Y10S977/888 ,  Y10S977/89 ,  Y10S977/891 ,  Y10T428/24802 ,  Y10T428/31504

Abstract: The present invention uses vacuum deposited thin films of material to create an interface that non-preferentially interacts with different domains of an underlying block copolymer film. The non-preferential interface prevents formation of a wetting layer and influences the orientation of domains in the block copolymer. The purpose of the deposited polymer is to produce nanostructured features in a block copolymer film that can serve as lithographic patterns.

Abstract translation: 本发明使用真空沉积的材料薄膜来产生与下面的嵌段共聚物膜的不同区域非优先相互作用的界面。 非优选界面防止形成润湿层并影响嵌段共聚物中结构域的取向。 沉积的聚合物的目的是在嵌段共聚物膜中产生可用作光刻图案的纳米结构特征。

公开(公告)号：US20130189492A1

公开(公告)日：2013-07-25

申请号：US13784353

申请日：2013-03-04

Applicant: Micron Technology, Inc.

Inventor： Dan B. Millward ,  Eugene P. Marsh

IPC: B81B1/00 ,  B81C1/00

CPC classification number: B81B1/00 ,  B81C1/00015 ,  B81C1/00031 ,  B81C2201/0149 ,  B81C2201/0198 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  C08L53/00 ,  G03F7/0002 ,  Y10S438/947 ,  Y10S977/888 ,  Y10S977/895 ,  Y10S977/90 ,  C08L2666/02

Abstract: Methods for fabricating sub-lithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multi-layer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface.

Abstract translation: 提供了利用自组装嵌段共聚物在表面上制备亚光刻纳米线性微通道阵列而不具有限定特征的方法，以及由这些方法形成的膜和器件。 该方法的实施方案使用多层诱导排序方法将层状膜与沟槽内的底层膜对准，并进行局部加热以使覆盖在沟槽上的层状相嵌段共聚物膜退出，并在剩余表面上向外退火。

公开(公告)号：US20130140272A1

公开(公告)日：2013-06-06

申请号：US13816720

申请日：2011-07-21

Applicant: Roelof Koole ,  Johan Frederik Dijksman ,  Sander Frederik Wuister ,  Emiel Peeters

Inventor： Roelof Koole ,  Johan Frederik Dijksman ,  Sander Frederik Wuister ,  Emiel Peeters

IPC: B44C1/22

CPC classification number: B44C1/227 ,  B81C1/00031 ,  B81C2201/0149 ,  B81C2201/0198 ,  G03F7/0002 ,  H01L21/0337

Abstract: A method of lithography on a substrate uses a self-assembled polymer (SAP) layer deposited on the substrate, with first and second domains arranged in a pattern across the layer. A planarization layer is formed over the SAP and a development etch applied to substantially remove a portion of the planarization layer over the second domain leaving a cap of the planarization layer substantially covering the first domain. The uncapped second domain is then removed from the surface by a breakthrough etch leaving the capped first domain as a pattern feature on the surface. A transfer etch may then be used to transfer the pattern feature to the substrate using the capped first domain. The capping allows the second domain to be removed, e.g., without excessive loss of lateral feature width for the remaining first domain, even when the difference in etch resistance between the first and second domains is small.

Abstract translation: 衬底上的光刻方法使用沉积在衬底上的自组装聚合物（SAP）层，其中第一和第二畴以整个层的图案排列。 平坦化层形成在SAP之上，并且显影蚀刻被施加以在第二域上基本上去除平坦化层的一部分，留下平坦化层的盖基本覆盖第一域。 然后通过穿透蚀刻从表面除去未封端的第二结构域，留下封盖的第一结构域作为表面上的图案特征。 然后可以使用转移蚀刻来使用封盖的第一结构域将图案特征转移到衬底。 封盖允许除去第二结构域，例如，即使当第一和第二畴之间的耐蚀刻性差异小时，也不会对剩余的第一区域的横向特征宽度过度损失。

公开(公告)号：US20130099362A1

公开(公告)日：2013-04-25

申请号：US13709397

申请日：2012-12-10

Applicant: International Business Machines Corporation

Inventor： Ho-Cheol Kim ,  Sang-min Park ,  Charles T. Rettner

IPC: H01L29/06

CPC classification number: H01L29/0657 ,  B81C1/00031 ,  B81C2201/0149 ,  G03F7/0002 ,  Y10T428/24479 ,  Y10T428/24521 ,  Y10T428/2457 ,  Y10T428/24612 ,  Y10T428/24802

Abstract: A method of forming a block copolymer pattern comprises providing a substrate comprising a topographic pre-pattern comprising a ridge surface separated by a height, h, greater than 0 nanometers from a trench surface; disposing a block copolymer comprising two or more block components on the topographic pre-pattern to form a layer having a thickness of more than 0 nanometers over the ridge surface and the trench surface; and annealing the layer to form a block copolymer pattern having a periodicity of the topographic pre-pattern, the block copolymer pattern comprising microdomains of self-assembled block copolymer disposed on the ridge surface and the trench surface, wherein the microdomains disposed on the ridge surface have a different orientation compared to the microdomains disposed on the trench surface. Also disclosed are semiconductor devices.

Abstract translation: 形成嵌段共聚物图案的方法包括提供包括地形预图案的基材，所述地貌预图案包括从沟槽表面分开高度h，大于0纳米的脊表面; 在所述地形预图案上设置包含两个或更多个嵌段组分的嵌段共聚物，以在所述脊表面和所述沟槽表面上形成厚度大于0纳米的层; 并退火所述层以形成具有所述地形预图案的周期性的嵌段共聚物图案，所述嵌段共聚物图案包括设置在所述脊表面上的自组装嵌段共聚物的微区域和所述沟槽表面，其中所述微区域设置在所述脊表面上 与设置在沟槽表面上的微区域相比具有不同的取向。 还公开了半导体器件。

公开(公告)号：US20130090264A1

公开(公告)日：2013-04-11

申请号：US13643653

申请日：2011-03-03

Applicant: Katsuhiro Isozaki ,  Kazushi Miki ,  Takao Ochiai ,  Tomoya Taguchi ,  Kohichi Nittoh

Inventor： Katsuhiro Isozaki ,  Kazushi Miki ,  Takao Ochiai ,  Tomoya Taguchi ,  Kohichi Nittoh

IPC: C40B50/18

CPC classification number: C40B50/18 ,  B01J23/52 ,  B01J35/0013 ,  B01J35/006 ,  B01J37/342 ,  B81C1/00031 ,  B81C2201/0149 ,  B82Y30/00 ,  C25D13/02 ,  C25D13/22 ,  C40B40/00

Abstract: An object of the invention is to provide a metal nanoparticle array structure in which metal nanoparticle arrays are firmly bonded to the substrate thereof via chemical bonding or the like and in which the coverage with the metal nanoparticle arrays is high.The problem can be solved by using a metal nanoparticle array structure 10 that comprises a substrate 1, a immobilizing layer 2 formed on one surface 1a of the substrate 1, and metal nanoparticle arrays 3 formed on one surface 2a of the immobilizing layer 2, wherein the metal nanoparticle arrays 3 are so arrayed that multiple metal nanoparticles 4 can be at regular intervals and the metal nanoparticles 4 are bonded to each other via the modifying part 5 arranged on a surface thereof while the metal nanoparticles 4 are immobilized on one surface 2a of the immobilizing layer 2 via chemical bonds.

Abstract translation: 本发明的目的是提供一种金属纳米颗粒阵列结构，其中金属纳米颗粒阵列通过化学键合等牢固地结合到其基底上，并且其中金属纳米颗粒阵列的覆盖率高。 该问题可以通过使用包含基板1，形成在基板1的一个表面1a上的固定层2和形成在固定层2的一个表面2a上的金属纳米颗粒阵列3的金属纳米颗粒阵列结构10来解决，其中 金属纳米颗粒阵列3如此排列，使得多个金属纳米颗粒4可以以规则的间隔，并且金属纳米颗粒4通过布置在其表面上的修饰部分5彼此结合，同时金属纳米颗粒4固定在一个表面2a上 固定层2通过化学键。

公开(公告)号：US08372295B2

公开(公告)日：2013-02-12

申请号：US11738169

申请日：2007-04-20

Applicant: Dan B. Millward

Inventor： Dan B. Millward

IPC: H01L21/302 ,  B82Y40/00

CPC classification number: H01L21/3086 ,  B81B2203/0361 ,  B81C1/00031 ,  B81C2201/0149 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/0337 ,  H01L21/76879 ,  H01L23/544 ,  H01L2924/0002 ,  Y10T428/24182 ,  Y10T428/24612 ,  H01L2924/00

Abstract: Methods for fabricating sublithographic, nanoscale arrays of openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the invention use a self-templating or multilayer approach to induce ordering of a self-assembling block copolymer film to an underlying base film to produce a multilayered film having an ordered array of nanostructures that can be removed to provide openings in the film which, in some embodiments, can be used as a template or mask to etch openings in an underlying material layer.

Abstract translation: 提供了使用自组装嵌段共聚物制造亚光刻，纳米级开口阵列和线性微通道的方法，以及由这些方法形成的膜和器件。 本发明的实施方案使用自模板或多层方法来诱导自组装嵌段共聚物膜对下面的基底膜的排序，以产生具有可排除以在膜中提供开口的纳米结构的有序阵列的多层膜， 在一些实施例中，可以用作模板或掩模来蚀刻下层材料层中的开口。

公开(公告)号：US08361704B2

公开(公告)日：2013-01-29

申请号：US12352051

申请日：2009-01-12

Applicant: Matthew E. Colburn ,  Wai-kin Li ,  Haining S. Yang

Inventor： Matthew E. Colburn ,  Wai-kin Li ,  Haining S. Yang

IPC: G03F7/20

CPC classification number: G03F7/40 ,  B81C1/00031 ,  B81C2201/0149 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/32139

Abstract: This invention provides a method for reducing tip-to-tip spacing between lines using a combination of photolithographic and copolymer self-assembling lithographic techniques. A mask layer is first formed over a substrate with a line structure. A trench opening of a width d is created in the mask layer. A layer of a self-assembling block copolymer is then applied over the mask layer. The block copolymer layer is annealed to form a single unit polymer block of a width or a diameter w which is smaller than d inside the trench opening. The single unit polymer block is selectively removed to form a single opening of a width or a diameter w inside the trench opening. An etch transfer process is performed using the single opening as a mask to form an opening in the line structure in the substrate.

Abstract translation: 本发明提供了使用光刻和共聚物自组装光刻技术的组合来减少线之间的尖端到尖端间隔的方法。 首先在具有线结构的衬底上形成掩模层。 在掩模层中形成宽度为d的沟槽开口。 然后将一层自组装嵌段共聚物施加在掩模层上。 对嵌段共聚物层进行退火以在沟槽开口内形成宽度或直径w小于d的单一单元聚合物嵌段。 选择性地去除单个单元聚合物嵌段以在沟槽开口内形成宽度或直径w的单个开口。 使用单个开口作为掩模进行蚀刻转印处理，以在基板中的线结构中形成开口。