公开(公告)号：US06657530B2

公开(公告)日：2003-12-02

申请号：US10162635

申请日：2002-06-06

Applicant: Kousaku Yamagata

Inventor： Kousaku Yamagata

IPC: H01F500

CPC classification number: H05K1/165 ,  H01F17/0013 ,  H01F41/045 ,  H05K2201/0715 ,  H05K2201/09536 ,  H05K2201/097

Abstract: On each surface of a dielectric substrate, arranged are a first conductor line pattern having a plurality of first line segments and a second conductor line pattern having a plurality of second line segments. Ends of each first conductor line segment overlap the second conductor line segments, and the first and second line segments are connected via through-holes, thereby forming a single spiral conductor line. Each second conductor line segment for connecting adjacent first conductor line segments has a pair of end parts connected to the first conductor line segments via through-holes and a halfway part having a smaller width.

Abstract translation: 在电介质基板的每个表面上，布置有具有多个第一线段的第一导体线图案和具有多个第二线段的第二导线图案。 每个第一导体线段的端部与第二导体线段重叠，并且第一和第二线段通过通孔连接，从而形成单个螺旋导体线。 用于连接相邻的第一导体线段的每个第二导体线段具有通过通孔连接到第一导体线段的一对端部和具有较小宽度的中间部分。

公开(公告)号：US20030215567A1

公开(公告)日：2003-11-20

申请号：US10241459

申请日：2002-09-12

Applicant: SAN-EI KAGAKU CO., LTD.

Inventor： Kiyoshi Sato ,  Kazunori Kitamura

IPC: B05D005/12 ,  B05D007/22

CPC classification number: H05K3/0094 ,  C08F283/10 ,  C08F290/00 ,  C08F290/06 ,  C08F290/064 ,  C08L63/00 ,  C08L63/10 ,  G03F7/038 ,  H05K3/287 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/0959 ,  C08L2666/22

Abstract: A photo-setting and thermosetting resin composition comprises (I) a partial adduct of epoxy resin with unsaturated aliphatic acid, (II) (meth)acrylates, (III) a photocrosslinking agent, (IV) liquid epoxy resin, and (V) a latent curing agent. The resin composition can be easily charged and plugged into a through-hole, does not drip down, and can be effectively photo-set and thermoset. A photo-set product prepared of the resin composition can be easily polished. A plugged-through-hole printed wiring (substrate) board prepared of the resin composition does not cause defects such as hollows, cracks, blisters, peelings and so on, is excellent in solder-resistance, does not corrode a metal part, and can produce an appliance of high reliability and long life which does not occur short circuit and poor electrical connection.

Abstract translation: 光固性和热固性树脂组合物包含（I）环氧树脂与不饱和脂肪酸的部分加合物，（II）（甲基）丙烯酸酯，（III）光交联剂，（IV）液体环氧树脂和（V） 潜在固化剂。 树脂组合物可以容易地充填并堵塞到通孔中，不会滴落，并且可以有效地进行光固化和热固化。 可以容易地研磨由树脂组合物制备的光固化剂产品。 通过树脂组合物制成的通孔印刷布线（基板）板不会引起中空，裂纹，起泡，剥离等缺陷，耐焊接性优异，不会腐蚀金属部，能够 生产高可靠性，长寿命的电器，不会发生短路和电连接不良。

公开(公告)号：US20030169038A1

公开(公告)日：2003-09-11

申请号：US10140266

申请日：2002-05-08

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Myung-Sam Kang ,  Kyoung-Won Na ,  Sang-On Choi ,  Won-Youl Choi ,  Jeong-Hwan Lee ,  Keon-Yang Park

IPC: G01R033/04

CPC classification number: G01R33/05 ,  G01C17/30 ,  H05K1/165 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/086 ,  H05K2201/09536 ,  H05K2201/10416

Abstract: A weak-magnetic field sensor using printed circuit board manufacturing technique and a method of manufacturing the same which detects the Earth's magnetic field to obtain positional information is disclosed. The sensor comprises a first base board which is formed at its upper and lower surfaces with first driving patterns such that the upper and lower first driving patterns are electrically connected to each other, a pair of first stacked boards which are stacked on upper and lower surfaces of the first base board and which are formed with magnetic layers to be parallel to each other and patterned in a certain shape, and a pair of second stacked boards which are stacked on outer surfaces of the pair of first stacked boards and which are formed with second driving patterns electrically connected to the first driving patterns of the first base board to surround magnetic layers and formed with pickup patterns to surround the first and second driving patterns.

Abstract translation: 公开了使用印刷电路板制造技术的弱磁场传感器及其制造方法，其检测地球磁场以获得位置信息。 传感器包括第一基板，其在其上表面和下表面处形成有第一驱动图案，使得上和下第一驱动图案彼此电连接;一对第一堆叠板，其堆叠在上表面和下表面上 并且形成有彼此平行并且形成一定形状的磁性层的一对第二堆叠板，并且堆叠在一对第一堆叠板的外表面上并且形成有 第二驱动图案，电连接到第一基板的第一驱动图案以包围磁性层并形成有拾取图案以包围第一和第二驱动图案。

公开(公告)号：US06613986B1

公开(公告)日：2003-09-02

申请号：US09787321

申请日：2001-05-17

Applicant: Naohiro Hirose ,  Honjin En

Inventor： Naohiro Hirose ,  Honjin En

IPC: H05K103

CPC classification number: H01L29/40 ,  H01L21/4763 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0224 ,  H05K1/0253 ,  H05K1/03 ,  H05K3/064 ,  H05K3/244 ,  H05K3/382 ,  H05K3/403 ,  H05K3/4602 ,  H05K2201/0347 ,  H05K2201/062 ,  H05K2201/093 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/09681 ,  H05K2203/1178

Abstract: Mesh holes 35a and 59a of upper solid layers 35 and upper solid layers 59 are formed to overlie on one another, so that the insulating properties of interlayer resin insulating layers 50 are not lowered. Here, the diameter of each mesh hole is preferably 75 to 300 &mgr;m. The reason is as follows. If the diameter of the mesh hole is less than 75 &mgr;m, it is difficult to overlay the upper and lower mesh holes on one another. If the diameter exceeds 300 &mgr;m, the insulating properties of the interlayer resin insulating layers deteriorate. In addition, the distance between the mesh holes is preferably 100 to 2000 &mgr;m. The reason is as follows. If the distance is less than 100 &mgr;m, the solid layer cannot function. If the distance exceeds 2000 &mgr;m, the deterioration of the insulating properties of the interlayer resin insulating film occurs.

公开(公告)号：US06586682B2

公开(公告)日：2003-07-01

申请号：US09511194

申请日：2000-02-23

Applicant: Jan I. Strandberg

Inventor： Jan I. Strandberg

IPC: H05K103

CPC classification number: H05K3/4602 ,  H05K1/0237 ,  H05K3/0023 ,  H05K3/388 ,  H05K2201/09536 ,  H05K2201/0959

Abstract: The present invention provides a solution to the problem of controlling the inter-layer impedance of a deposited thin film layer stack accommodating high-density interconnects. The invention enables high-density signal lines to be routed over a reference plane to achieve a desired characteristic impedance. In one embodiment, a first thin-film metal layer is formed on a planarized layer fabricated from multiple thin film dielectric layers. The reduced pad footprint in the first thin-film metal layer allows a major portion of the first thin-film metal layer to serve as a reference, or ground, plane to signal lines formed in a second thin-film metal layer that is separated from the first thin-film metal layer by a thin dielectric layer.

公开(公告)号：US20030112115A1

公开(公告)日：2003-06-19

申请号：US10162635

申请日：2002-06-06

Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA

Inventor： Kousaku Yamagata

IPC: H01F005/00

CPC classification number: H05K1/165 ,  H01F17/0013 ,  H01F41/045 ,  H05K2201/0715 ,  H05K2201/09536 ,  H05K2201/097

Abstract: On each surface of a dielectric substrate, arranged are a first conductor line pattern having a plurality of first line segments and a second conductor line pattern having a plurality of second line segments. Ends of each first conductor line segment overlap the second conductor line segments, and the first and second line segments are connected via through-holes, thereby forming a single spiral conductor line. Each second conductor line segment for connecting adjacent first conductor line segments has a pair of end parts connected to the first conductor line segments via through-holes and a halfway part having a smaller width.

公开(公告)号：US20030014728A1

公开(公告)日：2003-01-16

申请号：US10243432

申请日：2002-09-13

Inventor： Ian P. Shaeffer ,  Everett Basham

IPC: G06F017/50 ,  H03K017/693

CPC classification number: H05K7/1061 ,  H01R12/52 ,  H05K3/3436 ,  H05K3/368 ,  H05K2201/0949 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10378

Abstract: A system and method is described for providing a robust mechanical and electrical connection between two or more circuit boards which may be employed for diagnostic purposes and/or for permanent connections. A spacer block, connection block, or pedestal, preferably made of PCB type material is preferably disposed between two PCBs. The pedestal is preferably dimensioned to space the two PCBs far enough apart that the surface mount components on two boards connected employing the inventive pedestal do not interfere with one another. The pedestal preferably provides for ample signal density and signal quality because of the block thickness and availability of insulation within the pedestal.

公开(公告)号：US20030010440A1

公开(公告)日：2003-01-16

申请号：US10217616

申请日：2002-08-12

Inventor： Anilkumar C. Bhatt ,  Stephen J. Fuerniss ,  Joan Congelosi ,  Roy H. Magnuson ,  Voya R. Markovich

IPC: B32B031/00 ,  B32B031/26

CPC classification number: B32B7/04 ,  B32B27/26 ,  B32B27/32 ,  B32B2250/40 ,  B32B2305/72 ,  H05K3/0023 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4626 ,  H05K3/4641 ,  H05K2201/09509 ,  H05K2201/09536 ,  Y10S428/901 ,  Y10T428/24273 ,  Y10T428/28 ,  Y10T428/31511

Abstract: A dielectric structure, and an associated method of fabrication, wherein two fully cured photoimageable dielectric (PID) layers of the structure are nonadhesively interfaced by a partially cured PID layer. The partially cured PID layer includes a power plane sandwiched between a first partially cured PID sheet and a second partially cured PID sheet. The partially cured PID layer be formed either in isolation, or by successively forming upon one of the fully cured PID layers: the first partially cured PID sheet, the power plane, and the second partially cured PID sheet. The first partially cured PID sheet and the second partially cured PID sheet is the result of partially curing, by radiative exposure, a first uncured PID sheet and a second uncured PID sheet, respectively. The fully cured PID layers each include an internal power plane, a plated via having a blind end conductively coupled to the internal power plane, and a plated via passing through the fully cured PID layer. The dielectric structure may further include a first PID film partially cured by radiation and nonadhesively coupled to one of the fully cured PID layers. The dielectric structure may further include a second PID film partially cured by radiation and nonadhesively coupled to the other fully cured PID layer. The partially cured PID material of the dielectric structure may be fully cured by pressurization and/or elevated temperature.

Abstract translation: 电介质结构和相关联的制造方法，其中该结构的两个完全固化的可光成像电介质（PID）层通过部分固化的PID层非粘性地接合。 部分固化的PID层包括夹在第一部分固化的PID片和第二部分固化的PID片之间的动力平面。 部分固化的PID层被隔离形成，或者通过连续地形成在完全固化的PID层之一上：第一部分固化的PID片，动力平面和第二部分固化的PID片。 第一部分固化的PID片和第二部分固化的PID片分别是通过辐射曝光部分固化，第一未固化的PID片和第二未固化的PID片的结果。 完全固化的PID层各自包括内部电源平面，具有导电耦合到内部电源平面的盲端的电镀通孔以及穿过完全固化的PID层的电镀通孔。 电介质结构可以进一步包括通过辐射部分固化并且非粘性地耦合到完全固化的PID层之一的第一PID膜。 电介质结构可以进一步包括通过辐射部分地固化并且非粘性地耦合到另一完全固化的PID层的第二PID膜。 电介质结构的部分固化的PID材料可以通过加压和/或升高的温度完全固化。

公开(公告)号：US20030006857A1

公开(公告)日：2003-01-09

申请号：US10217674

申请日：2002-08-12

Inventor： Donald O. Anstrom ,  Bruce J. Chamberlin ,  John M. Lauffer ,  Voya R. Markovich ,  David L. Thomas

IPC: H01P003/08

CPC classification number: H01L23/5383 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0263 ,  H05K1/0265 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0352 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/061 ,  H05K2203/1581 ,  H01L2924/00

Abstract: A method and structure for implementing dense wiring, in printed circuit board or chip carrier applications, which provides superior electrical characteristics while preserving the system resistance and characteristic impedance requirements. The dense wiring is characterized by requiring that all wires have a sufficient cross-sectional area to ensure the longest wires used do not exceed a maximum resistance by either sorting wire lengths and allowing acceptably nullshortnull wires to use denser circuit lines or by providing short lengths of short circuit lines in those areas where necessary and switching to less dense, lower resistance lines where possible. The disclosure also provides for dense wiring in component areas that can then be converted to low resistance wiring with application of a buried via.

公开(公告)号：US20020189849A1

公开(公告)日：2002-12-19

申请号：US10108628

申请日：2002-03-29

Applicant: IBIDEN Co., Ltd.

Inventor： Naohiro Hirose ,  Takashi Kariya ,  Yoji Mori

IPC: H05K007/06

CPC classification number: H01R9/09 ,  H01L23/12 ,  H01L23/48 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H05K1/0256 ,  H05K1/0263 ,  H05K1/0265 ,  H05K1/0271 ,  H05K1/113 ,  H05K1/115 ,  H05K1/116 ,  H05K3/184 ,  H05K3/241 ,  H05K3/382 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09272 ,  H05K2201/09454 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09627 ,  H05K2201/09727 ,  H05K2201/09781 ,  H05K2201/10734 ,  H05K2203/0594 ,  Y10T29/49155 ,  Y10T29/49194 ,  Y10T428/31504

Abstract: A filet F is added to a portion constituting a corner portion C equal to or smaller than 90null in a crossing portion X of wiring patterns 58b, 58c and 58d, and a wiring pattern 58 is formed. Since the filet F is added, the wiring patterns are not made thin and are not disconnected in the crossing portion X. Further, since there is no stress concentrated to the crossing portion X, disconnection is not caused in the wiring patterns and no air bubbles are left between the crossing portion X of the wiring patterns and an interlayer resin insulating layer so that reliability of a printed wiring board is improved.

Abstract translation: 在布线图案58b，58c和58d的交叉部分X中，在构成拐角部分C等于或小于90°的部分加上一个纸条F，并形成布线图案58。 由于添加了纸张F，所以布线图案不会变薄，并且在交叉部分X中不会断开。另外，由于不会对交叉部分X集中的应力，因此布线图案中不会导致断线，也不会产生气泡 留在布线图案的交叉部分X和层间树脂绝缘层之间，从而提高了印刷线路板的可靠性