公开(公告)号：US08199516B2

公开(公告)日：2012-06-12

申请号：US12411035

申请日：2009-03-25

Applicant: Yuu Ishii ,  Kunihiro Naoe

Inventor： Yuu Ishii ,  Kunihiro Naoe

IPC: H05K7/10

CPC classification number: H05K3/4046 ,  H01L2224/16225 ,  H01R12/52 ,  H01R13/24 ,  H05K1/0313 ,  H05K1/036 ,  H05K3/326 ,  H05K2201/0133 ,  H05K2201/09081 ,  H05K2201/0949 ,  H05K2201/09845 ,  H05K2201/10378 ,  H05K2201/10416 ,  H05K2201/10734 ,  H05K2203/063 ,  Y10T29/49124

Abstract: An electronic component mounting board, including: a substrate base made of a flat-plate-like elastic body, the substrate base having a plurality of through-holes in a manner spaced a predetermined distance apart from each other; conductive members, each of which has a main unit portion filled in the through-hole, the main unit portion having a first protrusion portion and a second protrusion portion respectively on a first end and a second end thereof, with the first protrusion portion arranged so as to protrude from a first surface of the substrate base and the second protrusion portion arranged so as to protrude from a second surface of the substrate base; a flexible substrate that is arranged on the first surface of the substrate base and that has first opening portions for penetration of the first protrusion portions; and a plurality of oval electrodes arranged on the substrate, each of which has a second opening portion for penetration of the first protrusion portion, in which the electrodes are arranged in a manner spaced apart from each other, and each of the second opening portions is formed on a first end side of each of the electrodes.

Abstract translation: 一种电子部件安装板，包括：由平板状弹性体制成的基板基板，所述基板基部具有彼此隔开预定距离的多个通孔; 导电构件，每个导电构件具有填充在通孔中的主单元部分，主单元部分分别在第一端部和第二端部上分别具有第一突出部分和第二突出部分，第一突出部分布置成 从基板基板的第一表面突出并且第二突出部分布置成从基板基底的第二表面突出; 柔性基板，布置在基板基体的第一表面上，并且具有用于使第一突出部分穿透的第一开口部分; 以及布置在所述基板上的多个椭圆形电极，每个所述椭圆形电极具有用于使所述第一突起部分穿透的第二开口部分，其中所述电极以彼此间隔开的方式布置，并且每个所述第二开口部分 形成在每个电极的第一端侧。

公开(公告)号：US20120119370A1

公开(公告)日：2012-05-17

申请号：US13234175

申请日：2011-09-16

Applicant: JAE-WOOK YOO

Inventor： JAE-WOOK YOO

IPC: H01L23/488

CPC classification number: H01L21/486 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/00013 ,  H01L2924/15311 ,  H05K1/141 ,  H05K2201/10378 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2224/48227 ,  H01L2924/00012

Abstract: Provided are a semiconductor package and a semiconductor system including the semiconductor package. The semiconductor package includes a semiconductor device and an interconnect structure electrically connected to the semiconductor device and delivering a signal from the semiconductor device, wherein the interconnect structure includes an anodized insulation region and an interconnect adjacent to and defined by the anodized insulation region.

Abstract translation: 提供半导体封装和包括半导体封装的半导体系统。 半导体封装包括电连接到半导体器件并且传送来自半导体器件的信号的半导体器件和互连结构，其中所述互连结构包括阳极化绝缘区域以及邻近阳极化绝缘区域并由其限定的互连。

公开(公告)号：US08166646B2

公开(公告)日：2012-05-01

申请号：US12053570

申请日：2008-03-22

Applicant: Hiroto Sugahara

Inventor： Hiroto Sugahara

IPC: H01R9/00 ,  H05K3/00

CPC classification number: H05K3/361 ,  B41J2/14233 ,  B41J2/161 ,  B41J2/1623 ,  B41J2/1626 ,  B41J2/1632 ,  B41J2/1634 ,  B41J2/1642 ,  B41J2/1646 ,  B41J2002/14491 ,  H01L2924/00 ,  H01L2924/0002 ,  H05K1/0272 ,  H05K3/0052 ,  H05K3/107 ,  H05K3/321 ,  H05K3/3405 ,  H05K3/3415 ,  H05K3/363 ,  H05K3/4069 ,  H05K2201/09127 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2203/013 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A groove, and a recess which communicates with the groove, are formed in a substrate. Next, a through hole which communicates with the groove is formed. Thereafter, a wire is formed on an upper surface of the substrate, and an individual electrode is arranged on a lower surface of the substrate. Further, a droplet of an electroconductive liquid is made to land on the recess, and the liquid is filled in the through hole via the groove. Next, the liquid filled in the groove, the recess, and the through hole is heated to harden. Further, the recess and the groove of the substrate are removed by cutting up to an area near the through hole. Accordingly, it is possible to connect electrically the connecting bodies arranged on both surfaces of the substrate by filling an electroconductive material in the through holes easily.

Abstract translation: 凹槽和与槽连通的凹部形成在基板中。 接着，形成与槽连通的通孔。 此后，在基板的上表面上形成导线，并且在基板的下表面上设置单独的电极。 此外，使导电液体的液滴落在凹部上，并且液体经由凹槽填充在通孔中。 接下来，将填充在槽，凹部和通孔中的液体加热硬化。 此外，通过切割到通孔附近的区域来去除基板的凹部和凹槽。 因此，可以容易地在通孔中填充导电材料来电连接布置在基板的两个表面上的连接体。

公开(公告)号：US20120037409A1

公开(公告)日：2012-02-16

申请号：US13256114

申请日：2010-03-09

Applicant: Norihiro Yamaguchi ,  Hiroaki Umeda ,  Ken Yukawa

Inventor： Norihiro Yamaguchi ,  Hiroaki Umeda ,  Ken Yukawa

IPC: H05K1/09 ,  H05K3/30

CPC classification number: H05K3/46 ,  H01B1/22 ,  H05K1/0298 ,  H05K1/095 ,  H05K3/0032 ,  H05K3/4069 ,  H05K3/462 ,  H05K2201/0191 ,  H05K2201/0272 ,  H05K2201/0355 ,  H05K2201/10378 ,  H05K2203/0278 ,  H05K2203/0425 ,  H05K2203/1105 ,  H05K2203/111 ,  H05K2203/1194 ,  H05K2203/1461 ,  H05K2203/1572 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: In a method of manufacturing a multilayer board, including: a drilling step for forming a via hole through a pre-preg by laser beam machining, a step of filling the via hole with conductive paste containing a resin component and metal powder, and a step of arranging copper layers or copper layer portions of patterned boards on and under the filled conductive paste and pressing the same, a multilayer printed wiring board superior in conductivity and long-term stability is obtained by using alloying paste as the conductive paste in which at least part of the metal powder is melted and the metal powders adjacent to each other are alloyed, using a pre-preg having a ratio A/B of at least 10 before subjected to preheating, where A is a storage modulus at an inflection point where the storage modulus changes from increasing to decreasing and B is a storage modulus at an inflection point where the storage modulus changes from decreasing to increasing in a temperature profile rising from 60° C. to 200° C., and preheating the pre-preg before the drilling step to reduce the ratio A/B to below 10.

Abstract translation: 在制造多层板的方法中，包括：通过激光束加工形成通孔的钻孔步骤，用含有树脂成分和金属粉末的导电膏填充通孔的步骤，以及步骤 在填充的导电糊料上和下方布置图案化板的铜层或铜层部分并对其进行压制，通过使用合金糊作为导电浆料，获得导电性和长期稳定性优异的多层印刷线路板，其中至少 使用在进行预热之前，使用比例A / B为10以上的预浸料，将金属粉末的一部分熔融并且彼此相邻的金属粉末合金化，其中A是在拐点处的储能模量， 储能模量从增加到减少变化，B是在从60℃升高的温度分布中储能模量从降低到升高的拐点处的储能模量 到200℃，并且在钻井步骤之前预热预浸料以将A / B比率降低到10以下。

公开(公告)号：US20120015532A1

公开(公告)日：2012-01-19

申请号：US12837640

申请日：2010-07-16

Applicant: Voya R. Markovich ,  Ronald V. Smith ,  How T. Lin ,  Frank D. Egitto ,  Rabindra N. Das ,  William E. Wilson ,  Rajinder S. Rai

Inventor： Voya R. Markovich ,  Ronald V. Smith ,  How T. Lin ,  Frank D. Egitto ,  Rabindra N. Das ,  William E. Wilson ,  Rajinder S. Rai

IPC: H01R12/00 ,  H01L21/66

CPC classification number: H05K3/3436 ,  H05K1/111 ,  H05K2201/10378 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/4919

Abstract: A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.

Abstract translation: 柔性，高密度贴花及其在柔性芯片载体和印刷线路板之间形成可拆卸电互连的方法。 柔性贴花在第一表面上具有细间距焊盘，并且在第二表面上具有比微细间距更宽的间距的焊盘，设计成电连接到半导体器件的第一表面上的细间距焊盘和较宽间距 第二表面上的焊盘被设计成电连接到印刷线路板等。 第一表面上的焊盘通过柔性贴花中的一个或多个绝缘水平导电地连接到第二表面上的焊盘。

公开(公告)号：US08084083B2

公开(公告)日：2011-12-27

申请号：US13008537

申请日：2011-01-18

Applicant: Akira Otani ,  Koya Matsuura

Inventor： Akira Otani ,  Koya Matsuura

IPC: B05D1/12

CPC classification number: H05K3/323 ,  H01R4/04 ,  H05K2201/10378 ,  H05K2203/0191 ,  H05K2203/0271 ,  Y10T428/25 ,  Y10T428/254 ,  Y10T428/256

Abstract: A method for manufacturing an anisotropic conductive adhesive sheet is disclosed. The sheet comprises at least a curing agent, a curable insulating resin, and conductive particles. The method comprises providing an adhesive layer on a biaxially stretchable film to form a laminate, densely packing conductive particles having an average particle size of 1 to 8 μm on the laminate to form a conductive particle-attached film, biaxially stretching and holding the conductive particle-attached film so that the average particle distance between adjacent conductive particles is at least one to five times or less the average particle size of the conductive particles and not greater than 20 μm. The conductive particles are transferred to an adhesive sheet containing at least a curing agent and a curable insulating resin and having a thickness of at least 1.5 times the average particle distance between the conductive particles but not greater than 40 μm.

Abstract translation: 公开了一种制造各向异性导电粘合片的方法。 该片材至少包含固化剂，可固化绝缘树脂和导电颗粒。 该方法包括在双轴拉伸膜上设置粘合剂层以形成层压体，在层压板上密集填充平均粒度为1至8μm的导电颗粒以形成导电颗粒附着膜，双轴拉伸并保持导电颗粒 使得相邻导电粒子之间的平均粒子距离为导电粒子的平均粒径的至少一倍以上且不大于20μm。 将导电性粒子转移到至少含有固化剂和固化性绝缘性树脂的粘合片，其厚度为导电性粒子之间的平均粒子距离的至少1.5倍，但为40μm以下。

公开(公告)号：US20110311800A1

公开(公告)日：2011-12-22

申请号：US13165381

申请日：2011-06-21

Applicant: Kosuke YAMASHITA ,  Yusuke HATANAKA

Inventor： Kosuke YAMASHITA ,  Yusuke HATANAKA

IPC: B32B3/26 ,  C25D5/48 ,  C25D5/02

CPC classification number: C25D1/006 ,  C25D11/045 ,  C25D11/20 ,  C25D11/26 ,  C25D11/30 ,  H01L21/486 ,  H01L23/49827 ,  H01L24/29 ,  H01L2224/29 ,  H01L2224/29298 ,  H01L2224/83101 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01R12/52 ,  H05K3/32 ,  H05K2201/10378 ,  H05K2203/0315 ,  Y10T428/249953 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

Abstract: A microstructure enabling provision of an anisotropic conductive member capable of reducing wiring defects and a method of producing such microstructure. The microstructure includes through-holes formed in an insulating matrix and filled with a metal and an insulating substance. The through-holes have a density of 1×106 to 1×1010 holes/mm2, a mean opening diameter of 10 nm to 5000 nm, and a mean depth of 10 μm to 1000 μm. The sealing ratio of the through-holes as attained by the metal alone is 80% or more, and the sealing ratio of the through-holes as attained by the metal and the insulating substance is 99% or more. The insulating substance is at least one kind selected from the group consisting of aluminum hydroxide, silicon dioxide, metal alkoxide, lithium chloride, titanium oxide, magnesium oxide, tantalum oxide, niobium oxide, and zirconium oxide.

Abstract translation: 能够提供能够减少布线缺陷的各向异性导电构件的微结构及其制造方法。 微结构包括形成在绝缘基质中并填充有金属和绝缘物质的通孔。 通孔的密度为1×10 6〜1×10 10个孔/ mm 2，平均开口直径为10nm〜5000nm，平均深度为10μm〜1000μm。 由金属单独获得的通孔的密封比为80％以上，并且由金属和绝缘物质实现的通孔的密封率为99％以上。 所述绝缘物质是选自氢氧化铝，二氧化硅，金属醇盐，氯化锂，氧化钛，氧化镁，氧化钽，氧化铌和氧化锆中的至少一种。

公开(公告)号：US20110294315A1

公开(公告)日：2011-12-01

申请号：US13147939

申请日：2009-11-17

Applicant: Masahito Kawabata ,  Seiji Yamaguchi

Inventor： Masahito Kawabata ,  Seiji Yamaguchi

IPC: H01R12/71

CPC classification number: H05K1/141 ,  G06K7/0078 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/049 ,  H05K2201/09036 ,  H05K2201/10189 ,  H05K2201/10378 ,  H05K2201/10515 ,  H05K2201/2018 ,  H05K2201/2036

Abstract: Provided are a circuit board module and an electronic device provided with the same capable of increasing the strength of a card connector, with the configuration that the card connector is mounted to have a specific space from the board. The circuit board module is provided with a card connector portion 40 which includes a card insertion port from which a card C1 having at least one contact is inserted, and a housing chamber 42 which is formed to be communicated with the card insertion port to contain the card C1 therein; and a circuit board 10 having a surface which supports the card connector portion 40. The card connector portion 40 is provided with a spring contact portion which projects from a floor surface of the card connector which forms the housing chamber 42 at a side of the circuit board 10 into the housing chamber 42, and contacts the contact of the card C1 to secure the electrical connection with the contact, and at least one column member 31A is provided in a mount space S formed between the surface of the circuit board 10 and the card connector portion 40 so that the column member at least partly overlaps a beginning area which corresponds to a root portion of the spring contact portion which projects into the housing chamber 42.

Abstract translation: 提供了一种电路板模块和具有该电路板模块的电子设备，其能够增加卡连接器的强度，其中卡连接器被安装为具有与板的特定空间的配置。 电路板模块设置有卡连接器部分40，其包括插入有至少一个触点的卡C1的卡插入口和形成为与卡插入口连通以容纳该卡插入口的卡插入口 卡C1; 以及具有支撑卡连接器部分40的表面的电路板10.卡连接器部分40设置有弹簧接触部分，该弹簧接触部分从电路侧的形成容纳室42的卡连接器的地板表面突出 板10进入容纳室42中，并与卡C1的触点接触以固定与触点的电连接，并且至少一个柱构件31A设置在形成在电路板10的表面和 卡连接器部分40，使得柱构件至少部分地与对应于突出到壳体室42中的弹簧接触部分的根部分的起始区域重叠。

公开(公告)号：US08063315B2

公开(公告)日：2011-11-22

申请号：US11802434

申请日：2007-05-23

Applicant: Rabindra N. Das ,  Kostas I. Papathomas ,  Voya R. Markovich

Inventor： Rabindra N. Das ,  Kostas I. Papathomas ,  Voya R. Markovich

IPC: H05K1/11

CPC classification number: H05K1/0313 ,  B23K26/382 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/16 ,  B23K2103/172 ,  B23K2103/52 ,  H01B1/22 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/097 ,  H05K3/4053 ,  H05K3/4069 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0257 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/10378 ,  H05K2203/0425 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a metallic component including nano-particles and may include additional elements such as solder or other metal micro-particles, as well as a conducting polymer and organic. The particles of the paste composition sinter and, depending on what additional elements are added, melt as a result of lamination to thereby form effective contiguous circuit paths through the paste. A method of making such a substrate is also provided, as is an electrical assembly utilizing the substrate and including an electronic component such as a semiconductor chip coupled thereto.

Abstract translation: 一种电路化基板，包括用于提供电连接的导电浆料。 在一个实施方案中，糊状物包括包含纳米颗粒的金属组分，并且可以包括附加元素，例如焊料或其它金属微粒，以及导电聚合物和有机物。 糊料组合物的颗粒烧结并且根据添加的另外的元素而熔化，因为层压，从而形成通过糊料的有效连续的电路。 还提供了制造这种基板的方法，以及利用该基板并且包括诸如与其耦合的半导体芯片的电子部件的电组件。

公开(公告)号：US20110273091A1

公开(公告)日：2011-11-10

申请号：US13144165

申请日：2009-12-15

Applicant: Yohsuke Fujikawa

Inventor： Yohsuke Fujikawa

IPC: H05B37/02 ,  H01L51/52 ,  G02F1/1343

CPC classification number: H01R13/2414 ,  G02F1/13452 ,  G02F1/13454 ,  G09G3/3266 ,  G09G3/3275 ,  G09G2300/0426 ,  G09G2330/02 ,  H01R12/7076 ,  H05K1/029 ,  H05K3/325 ,  H05K2201/0314 ,  H05K2201/10128 ,  H05K2201/10378

Abstract: A plurality of input terminals (4, 4a, 17) provided on a surface of a common electrode substrate (3) which surface is opposed to a TFT substrate (2) are provided so as to be opposed to a plurality of output terminals (6) provided on an external circuit substrate (5). The plurality of input terminals (4, 4a, 17) are overlapped with the plurality of output terminals (6) when the plurality of input terminals (4, 4a, 17) and the plurality of output terminals (6) are viewed in one plane, but the plurality of input terminals (4, 4a, 17) are formed so as not to overlap the TFT substrate (2). The plurality of input terminals (4, 4a, 17) and a drive circuit are electrically connected via a conductor provided between the TFT substrate (2) and the common electrode substrate (3). The plurality of input terminals (4, 4a, 17) and the plurality of output terminals (6) are electrically connected via a connector (9) having a conductive region (7) and an insulating region (8) each formed into a striped pattern on surfaces for connection with the plurality of input terminals (4, 4a, 17) and the plurality of output terminals (6). This makes it possible to attain a display device that makes it possible to suppress an increase in production cost per unit and to have a high productivity.

Abstract translation: 设置在与TFT基板（2）相对的表面的公共电极基板（3）的表面上的多个输入端子（4,4a，17）设置成与多个输出端子（6）相对 ）设置在外部电路基板（5）上。 当在一个平面中观察多个输入端子（4,4a，17）和多个输出端子（6）时，多个输入端子（4,4a，17）与多个输出端子（6）重叠 但是多个输入端子（4,4a，17）形成为不与TFT基板（2）重叠。 多个输入端子（4,4a，17）和驱动电路经由设置在TFT基板（2）和公共电极基板（3）之间的导体电连接。 多个输入端子（4,4a，17）和多个输出端子（6）经由具有导电区域（7）和绝缘区域（8）的连接器（9）电连接，每个导体区域形成为条纹图案 在与多个输入端子（4,4a，17）和多个输出端子（6）连接的表面上。 这使得可以获得能够抑制每单位生产成本增加并且具有高生产率的显示装置。