公开(公告)号：US06942756B2

公开(公告)日：2005-09-13

申请号：US10207890

申请日：2002-07-31

Applicant: Takanori Suzuki ,  Hajime Tsuda

Inventor： Takanori Suzuki ,  Hajime Tsuda

IPC: B32B15/12 ,  B32B7/00 ,  B32B15/08 ,  B32B15/082 ,  B32B15/14 ,  B32B27/30 ,  D21H13/10 ,  D21H13/12 ,  D21H13/14 ,  D21H13/36 ,  D21H13/40 ,  D21H17/35 ,  D21H25/04 ,  D21H27/12 ,  D21H27/30 ,  H01B3/52 ,  H05K1/00 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00 ,  H05K3/02

CPC classification number: B32B15/14 ,  B32B15/20 ,  B32B2262/0253 ,  B32B2262/101 ,  B32B2305/026 ,  B32B2307/206 ,  B32B2307/306 ,  B32B2457/08 ,  D21H13/14 ,  D21H13/40 ,  D21H17/35 ,  H05K1/024 ,  H05K1/034 ,  H05K3/022 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0278 ,  Y10T428/12903 ,  Y10T428/12986 ,  Y10T428/24917

Abstract: The invention provides fluororesin fiber paper excellent in adhesion to a copper foil, heat resistance, chemical resistance, low water absorption and electric insulation and capable of being used as a substrate of a printed board suitable for use in high frequency, of which a low dielectric loss is required. The fluororesin fiber paper is a porous sheet obtained by forming a slurry comprising fluororesin fiber into a sheet by a wet paper making method and sintering the resultant sheet and has an average pore diameter of 0.5 to 50 μm and a maximum pore diameter of at most 250 μm. A copper-clad laminate for printed board is produced by laminating the fluororesin fiber paper and a copper foil having a ten point mean height of surface roughness profile (Rz) of 0.5 to 8.0 μm on each other by means of vacuum hot pressing.

Abstract translation: 本发明提供了对铜箔的粘附性优异的氟树脂纤维纸，耐热性，耐化学性，低吸水性和电绝缘性，并且能够用作适用于高频的印刷电路板的基板，其中低介电 需要损失 氟树脂纤维纸是通过湿法造纸法将包含氟树脂纤维的浆料形成片材而获得的多孔片材，并烧结所得片材，其平均孔径为0.5〜50μm，最大孔径为250以下 妈妈 通过真空热压将氟树脂纤维纸和表面粗糙度分布（Rz）的十分平均高度为0.5〜8.0μm的铜箔层叠在一起，制成印刷基板用覆铜层压板。

公开(公告)号：US20050139384A1

公开(公告)日：2005-06-30

申请号：US11060314

申请日：2005-02-18

Applicant: Takeshi Suzuki ,  Satoru Tomekawa ,  Yoshihiro Kawakita ,  Yasushi Nakagiri ,  Fumio Echigo

Inventor： Takeshi Suzuki ,  Satoru Tomekawa ,  Yoshihiro Kawakita ,  Yasushi Nakagiri ,  Fumio Echigo

IPC: H05K3/20 ,  H05K3/38 ,  H05K3/40 ,  H05K3/46 ,  B32B3/00 ,  H05K1/03 ,  H05K3/02

CPC classification number: H05K1/024 ,  H05K1/036 ,  H05K3/20 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K3/4658 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2203/1461 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/31511

Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.

Abstract translation: 压缩功能层60设置在至少一个板表面上。 压缩功能层60通过将板厚度方向的压力接收到包括该层的树脂板10而增加被压缩的功能。 由此，向导体14施加足够的压力。

公开(公告)号：US20040247842A1

公开(公告)日：2004-12-09

申请号：US10816222

申请日：2004-04-01

Inventor： Minoru Koyama ,  Yasunori Yamazaki

IPC: B05D005/12

CPC classification number: H05K3/125 ,  H05K1/03 ,  H05K1/0306 ,  H05K1/038 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/1208 ,  H05K2201/0116 ,  H05K2201/0187 ,  H05K2201/0284 ,  Y10T428/24802

Abstract: This device for manufacture of an electronic circuit forms a desired circuit pattern P by permeating liquid material (10, 40) including a material for circuit pattern formation into a permeable electronic substrate (100). This device for manufacture comprises an ink jet type head (20, 50) which discharges liquid material (10, 40) against an electronic substrate (100), and a shifting device (70) which relatively shifts the ink jet type head (20, 50) and the electronic substrate (100) with respect to one another.

Abstract translation: 用于制造电子电路的装置通过将包括用于电路图案形成的材料的液体材料（10,40）渗透到可渗透电子基板（100）中而形成期望的电路图案P. 该制造装置包括将液体材料（10,40）排放到电子基板（100）上的喷墨型头（20,50）和相对移动喷墨头（20）的移动装置（70） 50）和电子基板（100）。

公开(公告)号：US20040234689A1

公开(公告)日：2004-11-25

申请号：US10444398

申请日：2003-05-23

Inventor： Paul Morganelli ,  Jayesh Shah ,  David Peard

IPC: B05D005/00

CPC classification number: H05K3/305 ,  H01L21/563 ,  H01L24/29 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/73203 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3025 ,  H05K3/284 ,  H05K2201/0116 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2203/306 ,  Y02P70/613 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2224/13111 ,  H01L2924/0665 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2924/00 ,  H01L2224/0401

Abstract: The invention relates to a method for utilizing one or more B-stageable or pre-formed underfill encapsulant compositions in the application of electronic components, most commonly chip scale packages (CSP's) to substrates. One such composition comprises a thermoplastic resin system comprising a phenoxy resin, an expandable polymer sphere or thermosetting composition, optionally an epoxy resin such as higher molecular weight epoxy resin, a solvent, an imidazole-anhydride catalyst or comparable latent catalyst, and optionally, fluxing agents and/or wetting agents. The underfill encapsulant may be B-stageable to provide a coating on the substrate or component that is smooth and non-tacky. In an alternative embodiment, the underfill encapsulant is a pre-formed film. In both embodiments the expandable filler material expands upon the application of higher temperatures to form a closed-cell foam structure in the desired portion of the assembly. The method of applying the underfill application of the underfill to a component or substrate, attachment of the component and substrate, and heating of the assembly to a temperature sufficient to cause the expandable thermoplastic or thermosetting composition to foam. A second pre-applied underfill composition containing an epoxy resin, an anhydride curing agent, and catalyst may also be applied, either separately or in conjunction with the foamable underfill. The second composition acts as a pressure sensitive adhesive and may be applied selectively to parts of the CSP, for example to the solder bumps. The pressure sensitive adhesive property of the composition provides sufficient tack in order to hold the electronic assembly together during the assembly process.

Abstract translation: 本发明涉及一种在电子部件应用中使用一种或多种B阶或预先形成的底部填充密封剂组合物的方法，最常见的是芯片尺寸封装（CSP）到衬底。 一种这样的组合物包括包含苯氧树脂，可膨胀聚合物球或热固性组合物，任选的环氧树脂如较高分子量环氧树脂，溶剂，咪唑酐催化剂或可比较的潜催化剂的热塑性树脂体系，以及任选的助熔剂 试剂和/或润湿剂。 底部填充密封剂可以是B级的，以在基材或组分上提供光滑和非粘性的涂层。 在替代实施例中，底部填充密封剂是预成形膜。 在两个实施方案中，可膨胀填充材料在施加较高温度时膨胀以在组件的所需部分中形成闭孔泡沫结构。 将底部填充剂的底部填充施加到部件或基底，部件和基底的附接以及将组件加热到足以使可膨胀热塑性或热固性组合物发泡的温度的方法。 还可以单独地或与可发泡的底部填充剂一起施加包含环氧树脂，酸酐固化剂和催化剂的第二预先施加的底部填充组合物。 第二组合物用作压敏粘合剂并且可以选择性地施加到CSP的部分，例如到焊料凸块。 组合物的压敏粘合剂性质提供了足够的粘性，以便在组装过程中将电子组件保持在一起。

公开(公告)号：US20040217455A1

公开(公告)日：2004-11-04

申请号：US10483175

申请日：2004-01-09

Inventor： Osamu Shiono ,  Takao Ishikawa ,  Takashi Namekawa ,  Yasutaka Suzuki ,  Takashi Naito ,  Hiroki Yamamoto ,  Daigoro Kamoto ,  Ken Takahashi ,  Tadanori Segawa ,  Toshiya Sato ,  Takao Miwa ,  Shigehisa Motowaki

IPC: H01L023/02

CPC classification number: H05K3/4061 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49883 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49175 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01063 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/0306 ,  H05K1/113 ,  H05K3/426 ,  H05K2201/0116 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/09827 ,  H05K2201/09981 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A wiring glass substrate includes a glass substrate formed of glass and having a plurality of holes formed at predetermined positions, bumps so formed as to be connected to a conductive material filling the holes and wirings formed on a surface opposite to a surface having the bumps formed thereon and electrically connecting a plurality of connection terminals arranged in intervals different from intervals of the holes to the conductive material. The shape of the conductive material is porous and porous electrodes are bonded to the inner wall surfaces of the holes by an anchor effect to increase the strength of the glass substrate.

Abstract translation: 布线玻璃基板包括由玻璃形成的玻璃基板，在预定位置形成有多个孔，凸起形成为与填充孔的导电材料连接，形成在与形成有凸点的表面相对的表面上的布线 并且将与间隔不同的间隔布置的多个连接端子电连接到导电材料上。 导电材料的形状是多孔的，并且多孔电极通过锚固效应结合到孔的内壁表面，以增加玻璃基底的强度。

公开(公告)号：US06773572B2

公开(公告)日：2004-08-10

申请号：US10330300

申请日：2002-12-30

Applicant: Toshiyuki Kawashima ,  Nobuharu Tahara ,  Kenichi Ikeda

Inventor： Toshiyuki Kawashima ,  Nobuharu Tahara ,  Kenichi Ikeda

IPC: C23C2802

CPC classification number: H05K3/388 ,  B32B15/08 ,  B32B27/38 ,  C23C28/00 ,  C23C28/021 ,  C23C28/023 ,  H05K1/036 ,  H05K1/056 ,  H05K2201/0116 ,  Y10T428/12569 ,  Y10T428/31678

Abstract: A method of metal layer formation which can satisfactorily eliminate the problems caused by plating solution infiltration and is sufficiently effective in reducing the permittivity of an insulating layer; and a metal foil-based layered product obtainable by the method. The method is for forming a metal layer on a surface of a porous resin layer and includes: a step in which a porous resin layer having a dense layer as a surface part thereof is used as the porous resin layer and a thin metal film is formed on the surface of the dense layer by a dry process; and a step in which a metal film is formed on the surface of the thin metal film by plating.

Abstract translation: 金属层形成方法可以令人满意地消除由电镀溶液浸渗引起的问题，并且能够有效地降低绝缘层的介电常数; 以及通过该方法得到的金属箔基层叠体。 该方法是在多孔树脂层的表面形成金属层，其特征在于，具有作为其表面部分的具有致密层的多孔树脂层用作多孔树脂层和形成薄金属膜的步骤 通过干法在致密层的表面上; 以及通过电镀在金属薄膜的表面上形成金属膜的工序。

公开(公告)号：US20040142161A1

公开(公告)日：2004-07-22

申请号：US10754416

申请日：2004-01-09

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Yoshihiro Kawakita ,  Daizo Andoh ,  Fumio Echigo ,  Tadashi Nakamura

IPC: H05K001/11 ,  B32B003/26

CPC classification number: H05K3/4626 ,  H05K1/036 ,  H05K1/0366 ,  H05K3/20 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4652 ,  H05K3/4655 ,  H05K3/4658 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0278 ,  H05K2201/0293 ,  H05K2201/0355 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  Y10T428/249953 ,  Y10T428/249996

Abstract: A circuit board including a desired number of electrically insulating layers and wiring layers laminated alternately, and an inner via hole for securing an electrical connection between the wiring layers by compressing and hardening a conductive paste including a conductive particle and a resin. In the electrically insulating layer, a porous sheet is provided a resin sheet at least one surface, and the porous sheet is not impregnated with a resin at least at a central portion. A through hole penetrating the electrically insulating layer in the direction of the thickness of the electrically insulating layer is filled with a conductive paste including a conductive particle and a resin, and pores that are present inside the porous sheet are filled with laminated resin. The average hole diameter of the pores inside the porous sheet may be smaller than the average particle size of the conductive particle. Thereby, it is possible to make the insulating layer of the circuit board securing the interlayer electrically connection by an inner via hole including a conductive paste to be homogenized and ultra-thin and improve the reliability of the connection of the inner via hole.

Abstract translation: 包括所需数量的电绝缘层和交替层叠的布线层的电路板，以及用于通过压缩和硬化包括导电颗粒和树脂的导电膏来固定布线层之间的电连接的内通孔。 在电绝缘层中，多孔片材至少在一个表面上设置有树脂片，多孔片材至少在中心部分不浸渍树脂。 在电绝缘层的厚度方向贯通电绝缘层的贯通孔填充有包含导电性粒子和树脂的导电性糊剂，并且在多孔质片材内存在的孔填充有层叠树脂。 多孔片内的孔的平均孔径可以小于导电性粒子的平均粒径。 由此，可以使电路基板的绝缘层通过包含导电性糊剂的内部通路孔进行层间电连接，使其均匀化，超薄化，提高内部通孔连接的可靠性。

公开(公告)号：US20040135656A1

公开(公告)日：2004-07-15

申请号：US10365262

申请日：2003-02-11

Applicant: Xandex, Inc.

Inventor： Roger Sinsheimer ,  Vladan Temer

IPC: H01P003/08

CPC classification number: H01P3/081 ,  H01P3/084 ,  H05K1/024 ,  H05K1/0393 ,  H05K2201/0116 ,  H05K2201/0715 ,  H05K2201/09672 ,  H05K2201/2036

Abstract: A transmission line circuit is described which includes a conductive plane, a plurality of signal traces, and an intermediate layer between the conductive plane and the signal traces. The intermediate layer maintains a substantially constant separation between the conductive plane and the signal traces. At least a portion of the intermediate layer comprises air. The signal traces and the conductive plane form transmission lines.

Abstract translation: 描述了传输线电路，其包括导电平面，多个信号迹线以及导电平面和信号迹线之间的中间层。 中间层在导电平面和信号迹线之间保持基本恒定的间隔。 中间层的至少一部分包括空气。 信号迹线和导电平面形成传输线。

公开(公告)号：US06759082B2

公开(公告)日：2004-07-06

申请号：US10151072

申请日：2002-05-17

Applicant: Kenichi Ikeda ,  Toshiyuki Kawashima ,  Nobuharu Tahara

Inventor： Kenichi Ikeda ,  Toshiyuki Kawashima ,  Nobuharu Tahara

IPC: B05D512

CPC classification number: H05K3/4614 ,  H05K3/423 ,  H05K3/4626 ,  H05K3/4647 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/0116 ,  H05K2201/0154 ,  H05K2201/0355 ,  H05K2203/0369 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1147 ,  Y10T428/24917

Abstract: The present invention provides a method of manufacturing a metal foil laminated plate comprising the step of forming and attaching a resin porous layer onto a metal foil by a wet coagulating method, wherein a metal foil including a conductive bump having an almost equal height on a film forming side surface is used. The present invention provides a metal foil laminated plate comprising a metal foil including a conductive bump having an almost equal height and a resin porous layer laminated integrally, the conductive bump being exposed. The present invention provides another metal foil laminated plate comprising a metal foil including a conductive bump having an almost equal height, a resin porous layer laminated integrally, and a thermosetting resin impregnated in a hole of the resin porous layer, in which the conductive bump is exposed from the resin porous layer.

Abstract translation: 本发明提供一种金属箔层叠板的制造方法，其特征在于，包括以下步骤：通过湿式凝固法将树脂多孔层形成并附着到金属箔上，其中，在膜上具有几乎相同的高度的导电凸块的金属箔 使用形成侧面。 本发明提供一种金属箔层压板，其包括金属箔，该金属箔包括具有几乎相等高度的导电凸块和一体层压的树脂多孔层，所述导电凸块被暴露。 本发明提供另一种金属箔层压板，其包括金属箔，该金属箔包括具有几乎相同高度的导电凸块，一体层压的树脂多孔层和浸渍在树脂多孔层的孔中的热固性树脂，其中导电凸块 从树脂多孔层露出。

公开(公告)号：US20040099958A1

公开(公告)日：2004-05-27

申请号：US10301124

申请日：2002-11-21

Inventor： William R. Schildgen ,  Robin E. Gorrell ,  Michael D. Holcomb ,  William V. Ballard ,  Mark F. Sylvester

IPC: H01L023/48 ,  H01L023/52 ,  H01L029/40 ,  H01L023/12

CPC classification number: H05K1/0271 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49894 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K3/4626 ,  H05K3/4688 ,  H05K2201/0116 ,  H05K2201/0141 ,  H05K2201/015 ,  H05K2201/0154 ,  H01L2224/0401

Abstract: An interconnect module providing conductive interconnection paths between an integrated chip, a printed wiring board, and at least one layer within the module, incorporating a plurality of alternating dielectric and conductive layers laminated together to form a unitary structure. The module includes a chip attach surface and a board attach surface, that define contact pads for attachment to corresponding pads on the chip and printed wiring board, respectively, by means of solder balls.

Abstract translation: 一种互连模块，其在集成芯片，印刷线路板和模块内的至少一个层之间提供导电互连路径，并入多个交替的电介质层和导电层，以形成一体结构。 该模块包括芯片连接表面和板连接表面，其分别通过焊球限定接触垫，以分别连接到芯片和印刷线路板上的相应焊盘。